| SCORE | LINE | TOGGLE | BRANCH |
| 57.79 | 57.79 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.02 | 100.00 | 51.06 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__1_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.57 | 100.00 | 52.72 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.71 | 100.00 | 53.13 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.75 | 100.00 | 53.26 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.63 | 100.00 | 52.88 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.53 | 100.00 | 52.59 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.77 | 100.00 | 53.32 | 80.00 |
| mem_fle_0_cin_0 | 77.17 | 100.00 | 51.52 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 0.00 | 0.00 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 2.83 | 2.83 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 26.71 | 26.71 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 26.71 | 26.71 | ||
| mux_fle_2_in_2 | 26.03 | 26.03 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 26.03 | 26.03 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 2.83 | 2.83 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 3.77 | 3.77 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 26.71 | 26.71 | ||
| mux_fle_6_in_1 | 26.71 | 26.71 | ||
| mux_fle_6_in_2 | 27.40 | 27.40 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 26.03 | 26.03 | ||
| mux_fle_7_in_3 | 3.77 | 3.77 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 26.03 | 26.03 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 26.71 | 26.71 | ||
| mux_fle_9_in_1 | 26.71 | 26.71 | ||
| mux_fle_9_in_2 | 26.03 | 26.03 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.93 | 57.93 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.93 | 100.00 | 50.79 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__2_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.33 | 100.00 | 51.98 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.73 | 100.00 | 53.19 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.75 | 100.00 | 53.24 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.56 | 100.00 | 52.67 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.13 | 100.00 | 51.39 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.58 | 100.00 | 52.73 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.70 | 100.00 | 53.11 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.01 | 100.00 | 51.02 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.45 | 100.00 | 52.36 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.40 | 100.00 | 52.19 | 80.00 |
| mem_fle_0_cin_0 | 78.69 | 100.00 | 56.06 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 79.05 | 100.00 | 57.14 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 4.55 | 4.55 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 26.71 | 26.71 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 2.83 | 2.83 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 2.83 | 2.83 | ||
| mux_fle_1_in_4 | 1.89 | 1.89 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 2.83 | 2.83 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 26.71 | 26.71 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 3.77 | 3.77 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 2.83 | 2.83 | ||
| mux_fle_7_clk_0 | 61.76 | 61.76 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 2.83 | 2.83 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.91 | 59.91 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.19 | 100.00 | 57.57 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 62.25 | 62.25 | grid_clb_1__3_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.42 | 100.00 | 61.25 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.06 | 100.00 | 60.18 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 79.88 | 100.00 | 59.64 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 79.89 | 100.00 | 59.66 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.07 | 100.00 | 60.20 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 79.91 | 100.00 | 59.74 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 79.99 | 100.00 | 59.97 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.10 | 100.00 | 60.30 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 79.58 | 100.00 | 58.73 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 79.53 | 100.00 | 58.58 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_7_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_7_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 44.52 | 44.52 | ||
| mux_fle_0_in_1 | 36.99 | 36.99 | ||
| mux_fle_0_in_2 | 38.36 | 38.36 | ||
| mux_fle_0_in_3 | 21.70 | 21.70 | ||
| mux_fle_0_in_4 | 22.64 | 22.64 | ||
| mux_fle_0_in_5 | 13.21 | 13.21 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 41.78 | 41.78 | ||
| mux_fle_1_in_1 | 40.41 | 40.41 | ||
| mux_fle_1_in_2 | 39.73 | 39.73 | ||
| mux_fle_1_in_3 | 12.26 | 12.26 | ||
| mux_fle_1_in_4 | 15.09 | 15.09 | ||
| mux_fle_1_in_5 | 13.21 | 13.21 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 44.52 | 44.52 | ||
| mux_fle_2_in_1 | 39.73 | 39.73 | ||
| mux_fle_2_in_2 | 37.67 | 37.67 | ||
| mux_fle_2_in_3 | 23.58 | 23.58 | ||
| mux_fle_2_in_4 | 15.09 | 15.09 | ||
| mux_fle_2_in_5 | 13.21 | 13.21 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 36.30 | 36.30 | ||
| mux_fle_3_in_1 | 39.04 | 39.04 | ||
| mux_fle_3_in_2 | 39.73 | 39.73 | ||
| mux_fle_3_in_3 | 21.70 | 21.70 | ||
| mux_fle_3_in_4 | 15.09 | 15.09 | ||
| mux_fle_3_in_5 | 13.21 | 13.21 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 34.93 | 34.93 | ||
| mux_fle_4_in_1 | 39.73 | 39.73 | ||
| mux_fle_4_in_2 | 37.67 | 37.67 | ||
| mux_fle_4_in_3 | 21.70 | 21.70 | ||
| mux_fle_4_in_4 | 30.19 | 30.19 | ||
| mux_fle_4_in_5 | 13.21 | 13.21 | ||
| mux_fle_5_clk_0 | 64.71 | 64.71 | ||
| mux_fle_5_in_0 | 36.30 | 36.30 | ||
| mux_fle_5_in_1 | 39.73 | 39.73 | ||
| mux_fle_5_in_2 | 40.41 | 40.41 | ||
| mux_fle_5_in_3 | 21.70 | 21.70 | ||
| mux_fle_5_in_4 | 15.09 | 15.09 | ||
| mux_fle_5_in_5 | 13.21 | 13.21 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 35.62 | 35.62 | ||
| mux_fle_6_in_1 | 36.99 | 36.99 | ||
| mux_fle_6_in_2 | 45.21 | 45.21 | ||
| mux_fle_6_in_3 | 19.81 | 19.81 | ||
| mux_fle_6_in_4 | 27.36 | 27.36 | ||
| mux_fle_6_in_5 | 12.26 | 12.26 | ||
| mux_fle_7_clk_0 | 61.76 | 61.76 | ||
| mux_fle_7_in_0 | 43.15 | 43.15 | ||
| mux_fle_7_in_1 | 36.99 | 36.99 | ||
| mux_fle_7_in_2 | 45.89 | 45.89 | ||
| mux_fle_7_in_3 | 10.38 | 10.38 | ||
| mux_fle_7_in_4 | 23.58 | 23.58 | ||
| mux_fle_7_in_5 | 13.21 | 13.21 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 43.15 | 43.15 | ||
| mux_fle_8_in_1 | 39.04 | 39.04 | ||
| mux_fle_8_in_2 | 38.36 | 38.36 | ||
| mux_fle_8_in_3 | 12.26 | 12.26 | ||
| mux_fle_8_in_4 | 24.53 | 24.53 | ||
| mux_fle_8_in_5 | 13.21 | 13.21 | ||
| mux_fle_9_clk_0 | 64.71 | 64.71 | ||
| mux_fle_9_in_0 | 43.84 | 43.84 | ||
| mux_fle_9_in_1 | 39.73 | 39.73 | ||
| mux_fle_9_in_2 | 36.99 | 36.99 | ||
| mux_fle_9_in_3 | 13.21 | 13.21 | ||
| mux_fle_9_in_4 | 19.81 | 19.81 | ||
| mux_fle_9_in_5 | 13.21 | 13.21 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.11 | 60.11 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.69 | 100.00 | 59.07 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 62.01 | 62.01 | grid_clb_1__4_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.69 | 100.00 | 62.08 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.99 | 100.00 | 62.97 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.89 | 100.00 | 62.67 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.72 | 100.00 | 62.15 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.89 | 100.00 | 62.67 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.79 | 100.00 | 62.38 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.71 | 100.00 | 62.13 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.44 | 100.00 | 61.33 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.45 | 100.00 | 61.36 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.92 | 100.00 | 62.77 | 80.00 |
| mem_fle_0_cin_0 | 83.23 | 100.00 | 69.70 | 80.00 |
| mem_fle_0_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_0_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 54.55 | 54.55 | ||
| mux_fle_0_clk_0 | 64.71 | 64.71 | ||
| mux_fle_0_in_0 | 39.73 | 39.73 | ||
| mux_fle_0_in_1 | 44.52 | 44.52 | ||
| mux_fle_0_in_2 | 32.88 | 32.88 | ||
| mux_fle_0_in_3 | 14.15 | 14.15 | ||
| mux_fle_0_in_4 | 12.26 | 12.26 | ||
| mux_fle_0_in_5 | 13.21 | 13.21 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 38.36 | 38.36 | ||
| mux_fle_1_in_1 | 30.82 | 30.82 | ||
| mux_fle_1_in_2 | 46.58 | 46.58 | ||
| mux_fle_1_in_3 | 22.64 | 22.64 | ||
| mux_fle_1_in_4 | 13.21 | 13.21 | ||
| mux_fle_1_in_5 | 13.21 | 13.21 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 39.73 | 39.73 | ||
| mux_fle_2_in_1 | 41.78 | 41.78 | ||
| mux_fle_2_in_2 | 45.21 | 45.21 | ||
| mux_fle_2_in_3 | 11.32 | 11.32 | ||
| mux_fle_2_in_4 | 12.26 | 12.26 | ||
| mux_fle_2_in_5 | 13.21 | 13.21 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 39.04 | 39.04 | ||
| mux_fle_3_in_1 | 45.89 | 45.89 | ||
| mux_fle_3_in_2 | 40.41 | 40.41 | ||
| mux_fle_3_in_3 | 11.32 | 11.32 | ||
| mux_fle_3_in_4 | 13.21 | 13.21 | ||
| mux_fle_3_in_5 | 13.21 | 13.21 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 43.15 | 43.15 | ||
| mux_fle_4_in_1 | 42.47 | 42.47 | ||
| mux_fle_4_in_2 | 35.62 | 35.62 | ||
| mux_fle_4_in_3 | 11.32 | 11.32 | ||
| mux_fle_4_in_4 | 12.26 | 12.26 | ||
| mux_fle_4_in_5 | 13.21 | 13.21 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 32.19 | 32.19 | ||
| mux_fle_5_in_1 | 42.47 | 42.47 | ||
| mux_fle_5_in_2 | 37.67 | 37.67 | ||
| mux_fle_5_in_3 | 11.32 | 11.32 | ||
| mux_fle_5_in_4 | 13.21 | 13.21 | ||
| mux_fle_5_in_5 | 12.26 | 12.26 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 37.67 | 37.67 | ||
| mux_fle_6_in_1 | 37.67 | 37.67 | ||
| mux_fle_6_in_2 | 32.19 | 32.19 | ||
| mux_fle_6_in_3 | 11.32 | 11.32 | ||
| mux_fle_6_in_4 | 13.21 | 13.21 | ||
| mux_fle_6_in_5 | 13.21 | 13.21 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 32.19 | 32.19 | ||
| mux_fle_7_in_1 | 34.25 | 34.25 | ||
| mux_fle_7_in_2 | 45.89 | 45.89 | ||
| mux_fle_7_in_3 | 11.32 | 11.32 | ||
| mux_fle_7_in_4 | 11.32 | 11.32 | ||
| mux_fle_7_in_5 | 11.32 | 11.32 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 31.51 | 31.51 | ||
| mux_fle_8_in_1 | 41.78 | 41.78 | ||
| mux_fle_8_in_2 | 37.67 | 37.67 | ||
| mux_fle_8_in_3 | 11.32 | 11.32 | ||
| mux_fle_8_in_4 | 12.26 | 12.26 | ||
| mux_fle_8_in_5 | 10.38 | 10.38 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 47.26 | 47.26 | ||
| mux_fle_9_in_1 | 46.58 | 46.58 | ||
| mux_fle_9_in_2 | 35.62 | 35.62 | ||
| mux_fle_9_in_3 | 11.32 | 11.32 | ||
| mux_fle_9_in_4 | 12.26 | 12.26 | ||
| mux_fle_9_in_5 | 12.26 | 12.26 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.09 | 61.09 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.92 | 100.00 | 62.76 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 70.59 | 70.59 | grid_clb_1__5_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 81.26 | 100.00 | 63.77 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.32 | 100.00 | 63.97 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.59 | 100.00 | 64.78 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.28 | 100.00 | 63.83 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.63 | 100.00 | 61.89 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.10 | 100.00 | 63.31 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.39 | 100.00 | 64.16 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.41 | 100.00 | 64.23 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.52 | 100.00 | 64.55 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.46 | 100.00 | 64.37 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_2_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 63.70 | 63.70 | ||
| mux_fle_0_in_1 | 71.92 | 71.92 | ||
| mux_fle_0_in_2 | 74.66 | 74.66 | ||
| mux_fle_0_in_3 | 35.85 | 35.85 | ||
| mux_fle_0_in_4 | 33.96 | 33.96 | ||
| mux_fle_0_in_5 | 46.23 | 46.23 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 51.37 | 51.37 | ||
| mux_fle_1_in_1 | 73.29 | 73.29 | ||
| mux_fle_1_in_2 | 77.40 | 77.40 | ||
| mux_fle_1_in_3 | 36.79 | 36.79 | ||
| mux_fle_1_in_4 | 42.45 | 42.45 | ||
| mux_fle_1_in_5 | 48.11 | 48.11 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 62.33 | 62.33 | ||
| mux_fle_2_in_1 | 69.86 | 69.86 | ||
| mux_fle_2_in_2 | 75.34 | 75.34 | ||
| mux_fle_2_in_3 | 39.62 | 39.62 | ||
| mux_fle_2_in_4 | 33.96 | 33.96 | ||
| mux_fle_2_in_5 | 47.17 | 47.17 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 59.59 | 59.59 | ||
| mux_fle_3_in_1 | 77.40 | 77.40 | ||
| mux_fle_3_in_2 | 69.18 | 69.18 | ||
| mux_fle_3_in_3 | 34.91 | 34.91 | ||
| mux_fle_3_in_4 | 32.08 | 32.08 | ||
| mux_fle_3_in_5 | 46.23 | 46.23 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 50.00 | 50.00 | ||
| mux_fle_4_in_1 | 74.66 | 74.66 | ||
| mux_fle_4_in_2 | 76.71 | 76.71 | ||
| mux_fle_4_in_3 | 39.62 | 39.62 | ||
| mux_fle_4_in_4 | 33.02 | 33.02 | ||
| mux_fle_4_in_5 | 47.17 | 47.17 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 56.85 | 56.85 | ||
| mux_fle_5_in_1 | 71.92 | 71.92 | ||
| mux_fle_5_in_2 | 69.86 | 69.86 | ||
| mux_fle_5_in_3 | 39.62 | 39.62 | ||
| mux_fle_5_in_4 | 33.02 | 33.02 | ||
| mux_fle_5_in_5 | 47.17 | 47.17 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 63.01 | 63.01 | ||
| mux_fle_6_in_1 | 71.92 | 71.92 | ||
| mux_fle_6_in_2 | 73.29 | 73.29 | ||
| mux_fle_6_in_3 | 29.25 | 29.25 | ||
| mux_fle_6_in_4 | 33.96 | 33.96 | ||
| mux_fle_6_in_5 | 47.17 | 47.17 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 59.59 | 59.59 | ||
| mux_fle_7_in_1 | 73.29 | 73.29 | ||
| mux_fle_7_in_2 | 71.92 | 71.92 | ||
| mux_fle_7_in_3 | 35.85 | 35.85 | ||
| mux_fle_7_in_4 | 33.02 | 33.02 | ||
| mux_fle_7_in_5 | 46.23 | 46.23 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 56.16 | 56.16 | ||
| mux_fle_8_in_1 | 71.92 | 71.92 | ||
| mux_fle_8_in_2 | 78.08 | 78.08 | ||
| mux_fle_8_in_3 | 36.79 | 36.79 | ||
| mux_fle_8_in_4 | 33.96 | 33.96 | ||
| mux_fle_8_in_5 | 47.17 | 47.17 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 61.64 | 61.64 | ||
| mux_fle_9_in_1 | 71.92 | 71.92 | ||
| mux_fle_9_in_2 | 74.66 | 74.66 | ||
| mux_fle_9_in_3 | 42.45 | 42.45 | ||
| mux_fle_9_in_4 | 33.02 | 33.02 | ||
| mux_fle_9_in_5 | 46.23 | 46.23 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.53 | 60.53 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.93 | 100.00 | 59.80 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 64.95 | 64.95 | grid_clb_1__6_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.83 | 100.00 | 62.48 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.96 | 100.00 | 62.87 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.20 | 100.00 | 63.61 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.48 | 100.00 | 61.43 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.37 | 100.00 | 61.10 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 79.86 | 100.00 | 59.58 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.66 | 100.00 | 61.98 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.87 | 100.00 | 62.62 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.81 | 100.00 | 62.43 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.72 | 100.00 | 62.16 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 54.79 | 54.79 | ||
| mux_fle_0_in_1 | 37.67 | 37.67 | ||
| mux_fle_0_in_2 | 39.73 | 39.73 | ||
| mux_fle_0_in_3 | 26.42 | 26.42 | ||
| mux_fle_0_in_4 | 35.85 | 35.85 | ||
| mux_fle_0_in_5 | 19.81 | 19.81 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 49.32 | 49.32 | ||
| mux_fle_1_in_1 | 50.00 | 50.00 | ||
| mux_fle_1_in_2 | 57.53 | 57.53 | ||
| mux_fle_1_in_3 | 17.92 | 17.92 | ||
| mux_fle_1_in_4 | 21.70 | 21.70 | ||
| mux_fle_1_in_5 | 20.75 | 20.75 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 57.53 | 57.53 | ||
| mux_fle_2_in_1 | 50.00 | 50.00 | ||
| mux_fle_2_in_2 | 41.10 | 41.10 | ||
| mux_fle_2_in_3 | 31.13 | 31.13 | ||
| mux_fle_2_in_4 | 21.70 | 21.70 | ||
| mux_fle_2_in_5 | 20.75 | 20.75 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 41.10 | 41.10 | ||
| mux_fle_3_in_1 | 49.32 | 49.32 | ||
| mux_fle_3_in_2 | 50.00 | 50.00 | ||
| mux_fle_3_in_3 | 27.36 | 27.36 | ||
| mux_fle_3_in_4 | 21.70 | 21.70 | ||
| mux_fle_3_in_5 | 20.75 | 20.75 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 41.10 | 41.10 | ||
| mux_fle_4_in_1 | 42.47 | 42.47 | ||
| mux_fle_4_in_2 | 41.10 | 41.10 | ||
| mux_fle_4_in_3 | 22.64 | 22.64 | ||
| mux_fle_4_in_4 | 35.85 | 35.85 | ||
| mux_fle_4_in_5 | 19.81 | 19.81 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 40.41 | 40.41 | ||
| mux_fle_5_in_1 | 42.47 | 42.47 | ||
| mux_fle_5_in_2 | 49.32 | 49.32 | ||
| mux_fle_5_in_3 | 22.64 | 22.64 | ||
| mux_fle_5_in_4 | 20.75 | 20.75 | ||
| mux_fle_5_in_5 | 19.81 | 19.81 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 39.04 | 39.04 | ||
| mux_fle_6_in_1 | 36.99 | 36.99 | ||
| mux_fle_6_in_2 | 58.90 | 58.90 | ||
| mux_fle_6_in_3 | 32.08 | 32.08 | ||
| mux_fle_6_in_4 | 43.40 | 43.40 | ||
| mux_fle_6_in_5 | 20.75 | 20.75 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 52.05 | 52.05 | ||
| mux_fle_7_in_1 | 38.36 | 38.36 | ||
| mux_fle_7_in_2 | 59.59 | 59.59 | ||
| mux_fle_7_in_3 | 17.92 | 17.92 | ||
| mux_fle_7_in_4 | 31.13 | 31.13 | ||
| mux_fle_7_in_5 | 20.75 | 20.75 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 52.05 | 52.05 | ||
| mux_fle_8_in_1 | 49.32 | 49.32 | ||
| mux_fle_8_in_2 | 40.41 | 40.41 | ||
| mux_fle_8_in_3 | 17.92 | 17.92 | ||
| mux_fle_8_in_4 | 43.40 | 43.40 | ||
| mux_fle_8_in_5 | 20.75 | 20.75 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 54.79 | 54.79 | ||
| mux_fle_9_in_1 | 49.32 | 49.32 | ||
| mux_fle_9_in_2 | 40.41 | 40.41 | ||
| mux_fle_9_in_3 | 17.92 | 17.92 | ||
| mux_fle_9_in_4 | 33.02 | 33.02 | ||
| mux_fle_9_in_5 | 20.75 | 20.75 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.05 | 58.05 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.97 | 100.00 | 50.90 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__7_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.05 | 100.00 | 51.16 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.45 | 100.00 | 52.36 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.64 | 100.00 | 52.91 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.30 | 100.00 | 51.90 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.70 | 100.00 | 53.09 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.48 | 100.00 | 52.44 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.61 | 100.00 | 52.82 | 80.00 |
| mem_fle_0_cin_0 | 77.17 | 100.00 | 51.52 | 80.00 |
| mem_fle_0_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mux_fle_0_cin_0 | 0.00 | 0.00 | ||
| mux_fle_0_clk_0 | 64.71 | 64.71 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 3.77 | 3.77 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 26.71 | 26.71 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 2.83 | 2.83 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 26.71 | 26.71 | ||
| mux_fle_8_in_2 | 26.71 | 26.71 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 2.83 | 2.83 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 2.83 | 2.83 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.95 | 57.95 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.99 | 100.00 | 50.96 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__8_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.62 | 100.00 | 52.87 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.60 | 100.00 | 52.80 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.65 | 100.00 | 52.96 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.53 | 100.00 | 52.60 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.52 | 100.00 | 52.55 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.39 | 100.00 | 52.16 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.40 | 100.00 | 52.19 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.52 | 100.00 | 52.55 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 26.71 | 26.71 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 2.83 | 2.83 | ||
| mux_fle_0_in_4 | 1.89 | 1.89 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 2.83 | 2.83 | ||
| mux_fle_1_in_4 | 2.83 | 2.83 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 26.71 | 26.71 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 2.83 | 2.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 26.71 | 26.71 | ||
| mux_fle_4_in_2 | 26.71 | 26.71 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 3.77 | 3.77 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 26.71 | 26.71 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 26.71 | 26.71 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 2.83 | 2.83 | ||
| mux_fle_8_in_5 | 3.77 | 3.77 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 27.40 | 27.40 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.12 | 58.12 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.96 | 100.00 | 50.87 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__9_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.21 | 100.00 | 51.62 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.36 | 100.00 | 52.08 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.52 | 100.00 | 52.55 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.55 | 100.00 | 52.64 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.37 | 100.00 | 52.10 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.41 | 100.00 | 52.24 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.63 | 100.00 | 52.90 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.44 | 100.00 | 52.32 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 27.40 | 27.40 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 27.40 | 27.40 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 26.71 | 26.71 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 2.83 | 2.83 | ||
| mux_fle_2_in_4 | 3.77 | 3.77 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 26.71 | 26.71 | ||
| mux_fle_6_in_2 | 26.71 | 26.71 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 27.40 | 27.40 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.88 | 57.88 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.96 | 100.00 | 50.89 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__10_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.34 | 100.00 | 52.01 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.69 | 100.00 | 53.06 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.57 | 100.00 | 52.70 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.49 | 100.00 | 52.46 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.63 | 100.00 | 52.88 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.38 | 100.00 | 52.13 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.68 | 100.00 | 53.03 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.62 | 100.00 | 52.87 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.44 | 100.00 | 52.31 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 27.40 | 27.40 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 26.71 | 26.71 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 26.71 | 26.71 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 26.03 | 26.03 | ||
| mux_fle_2_in_1 | 26.71 | 26.71 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 2.83 | 2.83 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 2.83 | 2.83 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 26.71 | 26.71 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 2.83 | 2.83 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 26.71 | 26.71 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 26.71 | 26.71 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 27.40 | 27.40 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 3.77 | 3.77 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 26.03 | 26.03 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.06 | 58.06 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.93 | 100.00 | 50.79 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__11_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.57 | 100.00 | 52.70 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.15 | 100.00 | 51.46 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.40 | 100.00 | 52.21 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.38 | 100.00 | 52.14 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.22 | 100.00 | 51.67 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.60 | 100.00 | 52.80 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.80 | 100.00 | 53.39 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.33 | 100.00 | 51.98 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.44 | 100.00 | 52.32 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 26.71 | 26.71 | ||
| mux_fle_1_in_2 | 26.03 | 26.03 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 2.83 | 2.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 26.71 | 26.71 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 3.77 | 3.77 | ||
| mux_fle_5_in_4 | 2.83 | 2.83 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 3.77 | 3.77 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.03 | 58.03 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.95 | 100.00 | 50.86 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_1__12_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.28 | 100.00 | 51.83 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.41 | 100.00 | 52.24 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.57 | 100.00 | 52.70 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.63 | 100.00 | 52.90 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.57 | 100.00 | 52.70 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.29 | 100.00 | 51.88 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.59 | 100.00 | 52.77 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.62 | 100.00 | 52.85 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.32 | 100.00 | 51.96 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 27.40 | 27.40 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 2.83 | 2.83 | ||
| mux_fle_0_in_5 | 1.89 | 1.89 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 26.03 | 26.03 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 64.71 | 64.71 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 26.71 | 26.71 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 27.40 | 27.40 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 3.77 | 3.77 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 26.71 | 26.71 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.01 | 61.01 |
| SCORE | LINE | TOGGLE | BRANCH |
| 81.10 | 100.00 | 63.31 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 72.06 | 72.06 | grid_clb_2__1_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.26 | 100.00 | 60.77 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.68 | 100.00 | 65.05 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.28 | 100.00 | 63.83 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.25 | 100.00 | 63.74 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.52 | 100.00 | 64.57 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.53 | 100.00 | 64.60 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.08 | 100.00 | 63.23 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.69 | 100.00 | 65.06 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.87 | 100.00 | 62.62 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 82.15 | 100.00 | 66.45 | 80.00 |
| mem_fle_0_cin_0 | 78.69 | 100.00 | 56.06 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 4.55 | 4.55 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 54.11 | 54.11 | ||
| mux_fle_0_in_1 | 77.40 | 77.40 | ||
| mux_fle_0_in_2 | 79.45 | 79.45 | ||
| mux_fle_0_in_3 | 39.62 | 39.62 | ||
| mux_fle_0_in_4 | 50.00 | 50.00 | ||
| mux_fle_0_in_5 | 52.83 | 52.83 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 54.11 | 54.11 | ||
| mux_fle_1_in_1 | 73.29 | 73.29 | ||
| mux_fle_1_in_2 | 78.77 | 78.77 | ||
| mux_fle_1_in_3 | 39.62 | 39.62 | ||
| mux_fle_1_in_4 | 54.72 | 54.72 | ||
| mux_fle_1_in_5 | 51.89 | 51.89 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 53.42 | 53.42 | ||
| mux_fle_2_in_1 | 68.49 | 68.49 | ||
| mux_fle_2_in_2 | 79.45 | 79.45 | ||
| mux_fle_2_in_3 | 42.45 | 42.45 | ||
| mux_fle_2_in_4 | 56.60 | 56.60 | ||
| mux_fle_2_in_5 | 52.83 | 52.83 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 62.33 | 62.33 | ||
| mux_fle_3_in_1 | 78.08 | 78.08 | ||
| mux_fle_3_in_2 | 76.03 | 76.03 | ||
| mux_fle_3_in_3 | 39.62 | 39.62 | ||
| mux_fle_3_in_4 | 57.55 | 57.55 | ||
| mux_fle_3_in_5 | 52.83 | 52.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 65.75 | 65.75 | ||
| mux_fle_4_in_1 | 69.18 | 69.18 | ||
| mux_fle_4_in_2 | 80.14 | 80.14 | ||
| mux_fle_4_in_3 | 44.34 | 44.34 | ||
| mux_fle_4_in_4 | 53.77 | 53.77 | ||
| mux_fle_4_in_5 | 50.00 | 50.00 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 71.92 | 71.92 | ||
| mux_fle_5_in_1 | 68.49 | 68.49 | ||
| mux_fle_5_in_2 | 80.82 | 80.82 | ||
| mux_fle_5_in_3 | 44.34 | 44.34 | ||
| mux_fle_5_in_4 | 47.17 | 47.17 | ||
| mux_fle_5_in_5 | 51.89 | 51.89 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 60.96 | 60.96 | ||
| mux_fle_6_in_1 | 75.34 | 75.34 | ||
| mux_fle_6_in_2 | 75.34 | 75.34 | ||
| mux_fle_6_in_3 | 40.57 | 40.57 | ||
| mux_fle_6_in_4 | 57.55 | 57.55 | ||
| mux_fle_6_in_5 | 52.83 | 52.83 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 72.60 | 72.60 | ||
| mux_fle_7_in_1 | 73.97 | 73.97 | ||
| mux_fle_7_in_2 | 76.03 | 76.03 | ||
| mux_fle_7_in_3 | 40.57 | 40.57 | ||
| mux_fle_7_in_4 | 49.06 | 49.06 | ||
| mux_fle_7_in_5 | 52.83 | 52.83 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 67.81 | 67.81 | ||
| mux_fle_8_in_1 | 75.34 | 75.34 | ||
| mux_fle_8_in_2 | 80.14 | 80.14 | ||
| mux_fle_8_in_3 | 39.62 | 39.62 | ||
| mux_fle_8_in_4 | 50.00 | 50.00 | ||
| mux_fle_8_in_5 | 52.83 | 52.83 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 73.29 | 73.29 | ||
| mux_fle_9_in_1 | 67.81 | 67.81 | ||
| mux_fle_9_in_2 | 76.03 | 76.03 | ||
| mux_fle_9_in_3 | 50.00 | 50.00 | ||
| mux_fle_9_in_4 | 52.83 | 52.83 | ||
| mux_fle_9_in_5 | 52.83 | 52.83 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.01 | 58.01 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.96 | 100.00 | 50.87 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_2__2_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.42 | 100.00 | 52.26 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.63 | 100.00 | 52.90 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.44 | 100.00 | 52.31 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.62 | 100.00 | 52.85 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.69 | 100.00 | 53.06 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.66 | 100.00 | 52.98 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.45 | 100.00 | 52.34 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.29 | 100.00 | 51.88 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.19 | 100.00 | 51.56 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 3.77 | 3.77 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 1.89 | 1.89 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 64.71 | 64.71 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 26.71 | 26.71 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 26.71 | 26.71 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 2.83 | 2.83 | ||
| mux_fle_9_in_5 | 2.83 | 2.83 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.87 | 57.87 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.97 | 100.00 | 50.92 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_2__3_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.38 | 100.00 | 52.13 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.75 | 100.00 | 53.24 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.38 | 100.00 | 52.14 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.49 | 100.00 | 52.46 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.33 | 100.00 | 51.98 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.63 | 100.00 | 52.90 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.81 | 100.00 | 53.44 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.51 | 100.00 | 52.54 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 2.83 | 2.83 | ||
| mux_fle_0_in_5 | 2.83 | 2.83 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 2.83 | 2.83 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 2.83 | 2.83 | ||
| mux_fle_5_in_4 | 2.83 | 2.83 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 64.71 | 64.71 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 26.71 | 26.71 | ||
| mux_fle_6_in_3 | 1.89 | 1.89 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 2.83 | 2.83 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 26.71 | 26.71 | ||
| mux_fle_7_in_1 | 26.71 | 26.71 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 2.83 | 2.83 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 27.40 | 27.40 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 3.77 | 3.77 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 2.83 | 2.83 | ||
| mux_fle_9_in_4 | 2.83 | 2.83 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.14 | 61.14 |
| SCORE | LINE | TOGGLE | BRANCH |
| 81.13 | 100.00 | 63.40 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 72.79 | 72.79 | grid_clb_2__4_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.50 | 100.00 | 61.51 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.46 | 100.00 | 64.39 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.64 | 100.00 | 64.91 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.33 | 100.00 | 64.00 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.10 | 100.00 | 63.29 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.72 | 100.00 | 65.16 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.73 | 100.00 | 65.18 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.59 | 100.00 | 64.77 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.03 | 100.00 | 63.08 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.60 | 100.00 | 64.80 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 72.60 | 72.60 | ||
| mux_fle_0_in_1 | 63.70 | 63.70 | ||
| mux_fle_0_in_2 | 76.03 | 76.03 | ||
| mux_fle_0_in_3 | 40.57 | 40.57 | ||
| mux_fle_0_in_4 | 52.83 | 52.83 | ||
| mux_fle_0_in_5 | 49.06 | 49.06 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 63.01 | 63.01 | ||
| mux_fle_1_in_1 | 63.70 | 63.70 | ||
| mux_fle_1_in_2 | 77.40 | 77.40 | ||
| mux_fle_1_in_3 | 40.57 | 40.57 | ||
| mux_fle_1_in_4 | 58.49 | 58.49 | ||
| mux_fle_1_in_5 | 47.17 | 47.17 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 56.16 | 56.16 | ||
| mux_fle_2_in_1 | 69.18 | 69.18 | ||
| mux_fle_2_in_2 | 73.97 | 73.97 | ||
| mux_fle_2_in_3 | 50.94 | 50.94 | ||
| mux_fle_2_in_4 | 58.49 | 58.49 | ||
| mux_fle_2_in_5 | 49.06 | 49.06 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 56.16 | 56.16 | ||
| mux_fle_3_in_1 | 76.71 | 76.71 | ||
| mux_fle_3_in_2 | 80.14 | 80.14 | ||
| mux_fle_3_in_3 | 39.62 | 39.62 | ||
| mux_fle_3_in_4 | 57.55 | 57.55 | ||
| mux_fle_3_in_5 | 49.06 | 49.06 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 74.66 | 74.66 | ||
| mux_fle_4_in_1 | 64.38 | 64.38 | ||
| mux_fle_4_in_2 | 82.19 | 82.19 | ||
| mux_fle_4_in_3 | 40.57 | 40.57 | ||
| mux_fle_4_in_4 | 61.32 | 61.32 | ||
| mux_fle_4_in_5 | 47.17 | 47.17 | ||
| mux_fle_5_clk_0 | 64.71 | 64.71 | ||
| mux_fle_5_in_0 | 66.44 | 66.44 | ||
| mux_fle_5_in_1 | 71.92 | 71.92 | ||
| mux_fle_5_in_2 | 84.93 | 84.93 | ||
| mux_fle_5_in_3 | 39.62 | 39.62 | ||
| mux_fle_5_in_4 | 53.77 | 53.77 | ||
| mux_fle_5_in_5 | 49.06 | 49.06 | ||
| mux_fle_6_clk_0 | 64.71 | 64.71 | ||
| mux_fle_6_in_0 | 69.18 | 69.18 | ||
| mux_fle_6_in_1 | 70.55 | 70.55 | ||
| mux_fle_6_in_2 | 80.82 | 80.82 | ||
| mux_fle_6_in_3 | 40.57 | 40.57 | ||
| mux_fle_6_in_4 | 58.49 | 58.49 | ||
| mux_fle_6_in_5 | 49.06 | 49.06 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 64.38 | 64.38 | ||
| mux_fle_7_in_1 | 67.81 | 67.81 | ||
| mux_fle_7_in_2 | 73.29 | 73.29 | ||
| mux_fle_7_in_3 | 51.89 | 51.89 | ||
| mux_fle_7_in_4 | 61.32 | 61.32 | ||
| mux_fle_7_in_5 | 49.06 | 49.06 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 66.44 | 66.44 | ||
| mux_fle_8_in_1 | 72.60 | 72.60 | ||
| mux_fle_8_in_2 | 73.29 | 73.29 | ||
| mux_fle_8_in_3 | 38.68 | 38.68 | ||
| mux_fle_8_in_4 | 52.83 | 52.83 | ||
| mux_fle_8_in_5 | 49.06 | 49.06 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 63.70 | 63.70 | ||
| mux_fle_9_in_1 | 77.40 | 77.40 | ||
| mux_fle_9_in_2 | 72.60 | 72.60 | ||
| mux_fle_9_in_3 | 40.57 | 40.57 | ||
| mux_fle_9_in_4 | 65.09 | 65.09 | ||
| mux_fle_9_in_5 | 48.11 | 48.11 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.99 | 59.99 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.41 | 100.00 | 58.23 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 64.71 | 64.71 | grid_clb_2__5_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.42 | 100.00 | 61.26 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.51 | 100.00 | 61.53 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.43 | 100.00 | 61.28 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.20 | 100.00 | 60.59 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.12 | 100.00 | 60.36 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.31 | 100.00 | 60.92 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.75 | 100.00 | 53.24 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 79.04 | 100.00 | 57.11 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.65 | 100.00 | 61.95 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 45.89 | 45.89 | ||
| mux_fle_0_in_1 | 44.52 | 44.52 | ||
| mux_fle_0_in_2 | 52.74 | 52.74 | ||
| mux_fle_0_in_3 | 20.75 | 20.75 | ||
| mux_fle_0_in_4 | 26.42 | 26.42 | ||
| mux_fle_0_in_5 | 21.70 | 21.70 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 51.37 | 51.37 | ||
| mux_fle_1_in_1 | 39.04 | 39.04 | ||
| mux_fle_1_in_2 | 54.11 | 54.11 | ||
| mux_fle_1_in_3 | 18.87 | 18.87 | ||
| mux_fle_1_in_4 | 26.42 | 26.42 | ||
| mux_fle_1_in_5 | 21.70 | 21.70 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 47.26 | 47.26 | ||
| mux_fle_2_in_1 | 46.58 | 46.58 | ||
| mux_fle_2_in_2 | 54.79 | 54.79 | ||
| mux_fle_2_in_3 | 14.15 | 14.15 | ||
| mux_fle_2_in_4 | 26.42 | 26.42 | ||
| mux_fle_2_in_5 | 22.64 | 22.64 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 45.21 | 45.21 | ||
| mux_fle_3_in_1 | 51.37 | 51.37 | ||
| mux_fle_3_in_2 | 54.11 | 54.11 | ||
| mux_fle_3_in_3 | 15.09 | 15.09 | ||
| mux_fle_3_in_4 | 35.85 | 35.85 | ||
| mux_fle_3_in_5 | 22.64 | 22.64 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 52.74 | 52.74 | ||
| mux_fle_4_in_1 | 39.73 | 39.73 | ||
| mux_fle_4_in_2 | 54.79 | 54.79 | ||
| mux_fle_4_in_3 | 15.09 | 15.09 | ||
| mux_fle_4_in_4 | 33.96 | 33.96 | ||
| mux_fle_4_in_5 | 21.70 | 21.70 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 45.89 | 45.89 | ||
| mux_fle_5_in_1 | 46.58 | 46.58 | ||
| mux_fle_5_in_2 | 54.79 | 54.79 | ||
| mux_fle_5_in_3 | 24.53 | 24.53 | ||
| mux_fle_5_in_4 | 26.42 | 26.42 | ||
| mux_fle_5_in_5 | 22.64 | 22.64 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 45.21 | 45.21 | ||
| mux_fle_6_in_1 | 38.36 | 38.36 | ||
| mux_fle_6_in_2 | 47.95 | 47.95 | ||
| mux_fle_6_in_3 | 14.15 | 14.15 | ||
| mux_fle_6_in_4 | 27.36 | 27.36 | ||
| mux_fle_6_in_5 | 20.75 | 20.75 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 45.89 | 45.89 | ||
| mux_fle_7_in_1 | 46.58 | 46.58 | ||
| mux_fle_7_in_2 | 47.95 | 47.95 | ||
| mux_fle_7_in_3 | 14.15 | 14.15 | ||
| mux_fle_7_in_4 | 27.36 | 27.36 | ||
| mux_fle_7_in_5 | 21.70 | 21.70 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 56.16 | 56.16 | ||
| mux_fle_8_in_1 | 46.58 | 46.58 | ||
| mux_fle_8_in_2 | 48.63 | 48.63 | ||
| mux_fle_8_in_3 | 23.58 | 23.58 | ||
| mux_fle_8_in_4 | 26.42 | 26.42 | ||
| mux_fle_8_in_5 | 21.70 | 21.70 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 45.89 | 45.89 | ||
| mux_fle_9_in_1 | 45.89 | 45.89 | ||
| mux_fle_9_in_2 | 48.63 | 48.63 | ||
| mux_fle_9_in_3 | 23.58 | 23.58 | ||
| mux_fle_9_in_4 | 33.96 | 33.96 | ||
| mux_fle_9_in_5 | 22.64 | 22.64 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.96 | 57.96 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.08 | 100.00 | 51.23 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_2__6_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.46 | 100.00 | 52.37 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.57 | 100.00 | 52.72 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.49 | 100.00 | 52.46 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.59 | 100.00 | 52.78 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 79.16 | 100.00 | 57.47 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.52 | 100.00 | 52.55 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.45 | 100.00 | 52.36 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.45 | 100.00 | 52.34 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.55 | 100.00 | 52.64 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 26.71 | 26.71 | ||
| mux_fle_0_in_1 | 26.71 | 26.71 | ||
| mux_fle_0_in_2 | 26.03 | 26.03 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 25.34 | 25.34 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 2.83 | 2.83 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 0.94 | 0.94 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 26.71 | 26.71 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 1.89 | 1.89 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 64.71 | 64.71 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.90 | 60.90 |
| SCORE | LINE | TOGGLE | BRANCH |
| 81.06 | 100.00 | 63.19 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 72.06 | 72.06 | grid_clb_2__7_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.44 | 100.00 | 61.33 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.77 | 100.00 | 65.32 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.27 | 100.00 | 63.80 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.35 | 100.00 | 64.06 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.07 | 100.00 | 63.21 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.43 | 100.00 | 64.29 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.66 | 100.00 | 64.98 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.69 | 100.00 | 65.08 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.86 | 100.00 | 62.59 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.62 | 100.00 | 64.85 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 64.71 | 64.71 | ||
| mux_fle_0_in_0 | 55.48 | 55.48 | ||
| mux_fle_0_in_1 | 72.60 | 72.60 | ||
| mux_fle_0_in_2 | 80.82 | 80.82 | ||
| mux_fle_0_in_3 | 45.28 | 45.28 | ||
| mux_fle_0_in_4 | 53.77 | 53.77 | ||
| mux_fle_0_in_5 | 48.11 | 48.11 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 62.33 | 62.33 | ||
| mux_fle_1_in_1 | 66.44 | 66.44 | ||
| mux_fle_1_in_2 | 77.40 | 77.40 | ||
| mux_fle_1_in_3 | 46.23 | 46.23 | ||
| mux_fle_1_in_4 | 64.15 | 64.15 | ||
| mux_fle_1_in_5 | 48.11 | 48.11 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 55.48 | 55.48 | ||
| mux_fle_2_in_1 | 74.66 | 74.66 | ||
| mux_fle_2_in_2 | 71.23 | 71.23 | ||
| mux_fle_2_in_3 | 50.00 | 50.00 | ||
| mux_fle_2_in_4 | 60.38 | 60.38 | ||
| mux_fle_2_in_5 | 48.11 | 48.11 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 54.11 | 54.11 | ||
| mux_fle_3_in_1 | 75.34 | 75.34 | ||
| mux_fle_3_in_2 | 76.03 | 76.03 | ||
| mux_fle_3_in_3 | 46.23 | 46.23 | ||
| mux_fle_3_in_4 | 58.49 | 58.49 | ||
| mux_fle_3_in_5 | 47.17 | 47.17 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 65.75 | 65.75 | ||
| mux_fle_4_in_1 | 67.12 | 67.12 | ||
| mux_fle_4_in_2 | 78.77 | 78.77 | ||
| mux_fle_4_in_3 | 46.23 | 46.23 | ||
| mux_fle_4_in_4 | 57.55 | 57.55 | ||
| mux_fle_4_in_5 | 46.23 | 46.23 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 60.27 | 60.27 | ||
| mux_fle_5_in_1 | 75.34 | 75.34 | ||
| mux_fle_5_in_2 | 81.51 | 81.51 | ||
| mux_fle_5_in_3 | 44.34 | 44.34 | ||
| mux_fle_5_in_4 | 52.83 | 52.83 | ||
| mux_fle_5_in_5 | 47.17 | 47.17 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 64.38 | 64.38 | ||
| mux_fle_6_in_1 | 73.97 | 73.97 | ||
| mux_fle_6_in_2 | 78.77 | 78.77 | ||
| mux_fle_6_in_3 | 45.28 | 45.28 | ||
| mux_fle_6_in_4 | 56.60 | 56.60 | ||
| mux_fle_6_in_5 | 46.23 | 46.23 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 69.18 | 69.18 | ||
| mux_fle_7_in_1 | 73.29 | 73.29 | ||
| mux_fle_7_in_2 | 73.29 | 73.29 | ||
| mux_fle_7_in_3 | 53.77 | 53.77 | ||
| mux_fle_7_in_4 | 60.38 | 60.38 | ||
| mux_fle_7_in_5 | 46.23 | 46.23 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 67.81 | 67.81 | ||
| mux_fle_8_in_1 | 75.34 | 75.34 | ||
| mux_fle_8_in_2 | 71.92 | 71.92 | ||
| mux_fle_8_in_3 | 43.40 | 43.40 | ||
| mux_fle_8_in_4 | 52.83 | 52.83 | ||
| mux_fle_8_in_5 | 48.11 | 48.11 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 65.07 | 65.07 | ||
| mux_fle_9_in_1 | 70.55 | 70.55 | ||
| mux_fle_9_in_2 | 72.60 | 72.60 | ||
| mux_fle_9_in_3 | 46.23 | 46.23 | ||
| mux_fle_9_in_4 | 54.72 | 54.72 | ||
| mux_fle_9_in_5 | 47.17 | 47.17 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.12 | 58.12 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.11 | 100.00 | 51.33 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_2__8_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.28 | 100.00 | 51.85 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.55 | 100.00 | 52.64 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.71 | 100.00 | 53.13 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.76 | 100.00 | 53.29 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.68 | 100.00 | 53.03 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.53 | 100.00 | 52.60 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.29 | 100.00 | 51.87 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.59 | 100.00 | 52.77 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 78.97 | 100.00 | 56.91 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 26.71 | 26.71 | ||
| mux_fle_4_in_2 | 26.71 | 26.71 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 27.40 | 27.40 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 1.89 | 1.89 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.01 | 58.01 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.05 | 100.00 | 51.15 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_2__9_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.75 | 100.00 | 53.26 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.73 | 100.00 | 53.19 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.53 | 100.00 | 52.60 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.53 | 100.00 | 52.60 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.76 | 100.00 | 53.27 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.67 | 100.00 | 53.01 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.69 | 100.00 | 53.06 | 80.00 |
| mem_fle_0_cin_0 | 78.69 | 100.00 | 56.06 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 4.55 | 4.55 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 2.83 | 2.83 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 0.94 | 0.94 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 2.83 | 2.83 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 26.03 | 26.03 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 27.40 | 27.40 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 27.40 | 27.40 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 2.83 | 2.83 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.19 | 59.19 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.28 | 100.00 | 57.84 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 66.42 | 66.42 | grid_clb_2__10_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.35 | 100.00 | 52.05 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 78.90 | 100.00 | 56.71 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.29 | 100.00 | 60.87 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 79.78 | 100.00 | 59.35 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 79.73 | 100.00 | 59.20 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.04 | 100.00 | 60.13 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.16 | 100.00 | 60.49 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 79.77 | 100.00 | 59.30 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.10 | 100.00 | 60.30 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 79.80 | 100.00 | 59.41 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 34.93 | 34.93 | ||
| mux_fle_0_in_1 | 63.01 | 63.01 | ||
| mux_fle_0_in_2 | 53.42 | 53.42 | ||
| mux_fle_0_in_3 | 33.02 | 33.02 | ||
| mux_fle_0_in_4 | 17.92 | 17.92 | ||
| mux_fle_0_in_5 | 46.23 | 46.23 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 36.30 | 36.30 | ||
| mux_fle_1_in_1 | 63.01 | 63.01 | ||
| mux_fle_1_in_2 | 53.42 | 53.42 | ||
| mux_fle_1_in_3 | 32.08 | 32.08 | ||
| mux_fle_1_in_4 | 19.81 | 19.81 | ||
| mux_fle_1_in_5 | 47.17 | 47.17 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 35.62 | 35.62 | ||
| mux_fle_2_in_1 | 69.86 | 69.86 | ||
| mux_fle_2_in_2 | 67.12 | 67.12 | ||
| mux_fle_2_in_3 | 32.08 | 32.08 | ||
| mux_fle_2_in_4 | 18.87 | 18.87 | ||
| mux_fle_2_in_5 | 48.11 | 48.11 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 55.48 | 55.48 | ||
| mux_fle_3_in_1 | 69.86 | 69.86 | ||
| mux_fle_3_in_2 | 52.74 | 52.74 | ||
| mux_fle_3_in_3 | 33.02 | 33.02 | ||
| mux_fle_3_in_4 | 19.81 | 19.81 | ||
| mux_fle_3_in_5 | 48.11 | 48.11 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 36.30 | 36.30 | ||
| mux_fle_4_in_1 | 63.70 | 63.70 | ||
| mux_fle_4_in_2 | 52.74 | 52.74 | ||
| mux_fle_4_in_3 | 35.85 | 35.85 | ||
| mux_fle_4_in_4 | 26.42 | 26.42 | ||
| mux_fle_4_in_5 | 46.23 | 46.23 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 35.62 | 35.62 | ||
| mux_fle_5_in_1 | 69.18 | 69.18 | ||
| mux_fle_5_in_2 | 53.42 | 53.42 | ||
| mux_fle_5_in_3 | 39.62 | 39.62 | ||
| mux_fle_5_in_4 | 16.98 | 16.98 | ||
| mux_fle_5_in_5 | 45.28 | 45.28 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 36.30 | 36.30 | ||
| mux_fle_6_in_1 | 67.12 | 67.12 | ||
| mux_fle_6_in_2 | 54.11 | 54.11 | ||
| mux_fle_6_in_3 | 41.51 | 41.51 | ||
| mux_fle_6_in_4 | 18.87 | 18.87 | ||
| mux_fle_6_in_5 | 48.11 | 48.11 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 35.62 | 35.62 | ||
| mux_fle_7_in_1 | 63.70 | 63.70 | ||
| mux_fle_7_in_2 | 54.11 | 54.11 | ||
| mux_fle_7_in_3 | 41.51 | 41.51 | ||
| mux_fle_7_in_4 | 33.02 | 33.02 | ||
| mux_fle_7_in_5 | 48.11 | 48.11 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 55.48 | 55.48 | ||
| mux_fle_8_in_1 | 63.70 | 63.70 | ||
| mux_fle_8_in_2 | 54.11 | 54.11 | ||
| mux_fle_8_in_3 | 31.13 | 31.13 | ||
| mux_fle_8_in_4 | 19.81 | 19.81 | ||
| mux_fle_8_in_5 | 47.17 | 47.17 | ||
| mux_fle_9_clk_0 | 64.71 | 64.71 | ||
| mux_fle_9_in_0 | 36.30 | 36.30 | ||
| mux_fle_9_in_1 | 63.01 | 63.01 | ||
| mux_fle_9_in_2 | 66.44 | 66.44 | ||
| mux_fle_9_in_3 | 33.02 | 33.02 | ||
| mux_fle_9_in_4 | 18.87 | 18.87 | ||
| mux_fle_9_in_5 | 48.11 | 48.11 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.03 | 58.03 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.04 | 100.00 | 51.12 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_2__11_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.57 | 100.00 | 52.72 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.69 | 100.00 | 53.06 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.56 | 100.00 | 52.69 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.65 | 100.00 | 52.96 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.68 | 100.00 | 53.05 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.48 | 100.00 | 52.44 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.62 | 100.00 | 52.87 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 1.89 | 1.89 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 26.71 | 26.71 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 26.03 | 26.03 | ||
| mux_fle_6_in_3 | 2.83 | 2.83 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.54 | 61.54 |
| SCORE | LINE | TOGGLE | BRANCH |
| 81.37 | 100.00 | 64.10 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 73.28 | 73.28 | grid_clb_2__12_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 100.00 | 100.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 100.00 | 100.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 100.00 | 100.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 100.00 | 100.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 100.00 | 100.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 100.00 | 100.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 100.00 | 100.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 100.00 | 100.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 100.00 | 100.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 100.00 | 100.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 100.00 | 100.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 100.00 | 100.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 100.00 | 100.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 100.00 | 100.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 100.00 | 100.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 100.00 | 100.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 100.00 | 100.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 100.00 | 100.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 100.00 | 100.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 100.00 | 100.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.75 | 100.00 | 62.25 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 82.07 | 100.00 | 66.22 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.19 | 100.00 | 63.57 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.51 | 100.00 | 64.54 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 82.10 | 100.00 | 66.31 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.77 | 100.00 | 65.32 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.49 | 100.00 | 64.47 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.70 | 100.00 | 65.09 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.60 | 100.00 | 64.80 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.93 | 100.00 | 65.78 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 54.79 | 54.79 | ||
| mux_fle_0_in_1 | 73.29 | 73.29 | ||
| mux_fle_0_in_2 | 82.19 | 82.19 | ||
| mux_fle_0_in_3 | 43.40 | 43.40 | ||
| mux_fle_0_in_4 | 46.23 | 46.23 | ||
| mux_fle_0_in_5 | 59.43 | 59.43 | ||
| mux_fle_1_clk_0 | 64.71 | 64.71 | ||
| mux_fle_1_in_0 | 55.48 | 55.48 | ||
| mux_fle_1_in_1 | 74.66 | 74.66 | ||
| mux_fle_1_in_2 | 82.88 | 82.88 | ||
| mux_fle_1_in_3 | 42.45 | 42.45 | ||
| mux_fle_1_in_4 | 56.60 | 56.60 | ||
| mux_fle_1_in_5 | 59.43 | 59.43 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 54.79 | 54.79 | ||
| mux_fle_2_in_1 | 69.18 | 69.18 | ||
| mux_fle_2_in_2 | 75.34 | 75.34 | ||
| mux_fle_2_in_3 | 51.89 | 51.89 | ||
| mux_fle_2_in_4 | 54.72 | 54.72 | ||
| mux_fle_2_in_5 | 58.49 | 58.49 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 62.33 | 62.33 | ||
| mux_fle_3_in_1 | 78.08 | 78.08 | ||
| mux_fle_3_in_2 | 71.92 | 71.92 | ||
| mux_fle_3_in_3 | 43.40 | 43.40 | ||
| mux_fle_3_in_4 | 51.89 | 51.89 | ||
| mux_fle_3_in_5 | 57.55 | 57.55 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 63.01 | 63.01 | ||
| mux_fle_4_in_1 | 69.86 | 69.86 | ||
| mux_fle_4_in_2 | 73.97 | 73.97 | ||
| mux_fle_4_in_3 | 50.00 | 50.00 | ||
| mux_fle_4_in_4 | 59.43 | 59.43 | ||
| mux_fle_4_in_5 | 58.49 | 58.49 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 66.44 | 66.44 | ||
| mux_fle_5_in_1 | 68.49 | 68.49 | ||
| mux_fle_5_in_2 | 80.82 | 80.82 | ||
| mux_fle_5_in_3 | 46.23 | 46.23 | ||
| mux_fle_5_in_4 | 46.23 | 46.23 | ||
| mux_fle_5_in_5 | 59.43 | 59.43 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 65.75 | 65.75 | ||
| mux_fle_6_in_1 | 77.40 | 77.40 | ||
| mux_fle_6_in_2 | 71.92 | 71.92 | ||
| mux_fle_6_in_3 | 42.45 | 42.45 | ||
| mux_fle_6_in_4 | 53.77 | 53.77 | ||
| mux_fle_6_in_5 | 59.43 | 59.43 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 66.44 | 66.44 | ||
| mux_fle_7_in_1 | 79.45 | 79.45 | ||
| mux_fle_7_in_2 | 70.55 | 70.55 | ||
| mux_fle_7_in_3 | 43.40 | 43.40 | ||
| mux_fle_7_in_4 | 46.23 | 46.23 | ||
| mux_fle_7_in_5 | 57.55 | 57.55 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 69.86 | 69.86 | ||
| mux_fle_8_in_1 | 76.03 | 76.03 | ||
| mux_fle_8_in_2 | 78.77 | 78.77 | ||
| mux_fle_8_in_3 | 43.40 | 43.40 | ||
| mux_fle_8_in_4 | 46.23 | 46.23 | ||
| mux_fle_8_in_5 | 59.43 | 59.43 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 65.75 | 65.75 | ||
| mux_fle_9_in_1 | 69.86 | 69.86 | ||
| mux_fle_9_in_2 | 71.92 | 71.92 | ||
| mux_fle_9_in_3 | 48.11 | 48.11 | ||
| mux_fle_9_in_4 | 59.43 | 59.43 | ||
| mux_fle_9_in_5 | 58.49 | 58.49 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.10 | 60.10 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.02 | 100.00 | 60.05 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 68.38 | 68.38 | grid_clb_4__1_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.69 | 100.00 | 53.06 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.30 | 100.00 | 60.89 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.26 | 100.00 | 60.79 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.47 | 100.00 | 61.41 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.89 | 100.00 | 62.67 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.26 | 100.00 | 60.77 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.95 | 100.00 | 62.84 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.31 | 100.00 | 63.93 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.94 | 100.00 | 62.82 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.87 | 100.00 | 62.61 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 47.26 | 47.26 | ||
| mux_fle_0_in_1 | 54.79 | 54.79 | ||
| mux_fle_0_in_2 | 54.79 | 54.79 | ||
| mux_fle_0_in_3 | 21.70 | 21.70 | ||
| mux_fle_0_in_4 | 23.58 | 23.58 | ||
| mux_fle_0_in_5 | 48.11 | 48.11 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 56.85 | 56.85 | ||
| mux_fle_1_in_1 | 54.79 | 54.79 | ||
| mux_fle_1_in_2 | 56.85 | 56.85 | ||
| mux_fle_1_in_3 | 21.70 | 21.70 | ||
| mux_fle_1_in_4 | 44.34 | 44.34 | ||
| mux_fle_1_in_5 | 48.11 | 48.11 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 45.89 | 45.89 | ||
| mux_fle_2_in_1 | 58.22 | 58.22 | ||
| mux_fle_2_in_2 | 56.16 | 56.16 | ||
| mux_fle_2_in_3 | 29.25 | 29.25 | ||
| mux_fle_2_in_4 | 23.58 | 23.58 | ||
| mux_fle_2_in_5 | 47.17 | 47.17 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 46.58 | 46.58 | ||
| mux_fle_3_in_1 | 69.18 | 69.18 | ||
| mux_fle_3_in_2 | 70.55 | 70.55 | ||
| mux_fle_3_in_3 | 20.75 | 20.75 | ||
| mux_fle_3_in_4 | 23.58 | 23.58 | ||
| mux_fle_3_in_5 | 48.11 | 48.11 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 47.26 | 47.26 | ||
| mux_fle_4_in_1 | 61.64 | 61.64 | ||
| mux_fle_4_in_2 | 79.45 | 79.45 | ||
| mux_fle_4_in_3 | 20.75 | 20.75 | ||
| mux_fle_4_in_4 | 42.45 | 42.45 | ||
| mux_fle_4_in_5 | 48.11 | 48.11 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 46.58 | 46.58 | ||
| mux_fle_5_in_1 | 70.55 | 70.55 | ||
| mux_fle_5_in_2 | 80.14 | 80.14 | ||
| mux_fle_5_in_3 | 20.75 | 20.75 | ||
| mux_fle_5_in_4 | 22.64 | 22.64 | ||
| mux_fle_5_in_5 | 48.11 | 48.11 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 50.68 | 50.68 | ||
| mux_fle_6_in_1 | 60.27 | 60.27 | ||
| mux_fle_6_in_2 | 80.14 | 80.14 | ||
| mux_fle_6_in_3 | 21.70 | 21.70 | ||
| mux_fle_6_in_4 | 23.58 | 23.58 | ||
| mux_fle_6_in_5 | 46.23 | 46.23 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 56.85 | 56.85 | ||
| mux_fle_7_in_1 | 55.48 | 55.48 | ||
| mux_fle_7_in_2 | 63.01 | 63.01 | ||
| mux_fle_7_in_3 | 33.02 | 33.02 | ||
| mux_fle_7_in_4 | 41.51 | 41.51 | ||
| mux_fle_7_in_5 | 47.17 | 47.17 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 58.90 | 58.90 | ||
| mux_fle_8_in_1 | 71.23 | 71.23 | ||
| mux_fle_8_in_2 | 55.48 | 55.48 | ||
| mux_fle_8_in_3 | 21.70 | 21.70 | ||
| mux_fle_8_in_4 | 22.64 | 22.64 | ||
| mux_fle_8_in_5 | 48.11 | 48.11 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 47.26 | 47.26 | ||
| mux_fle_9_in_1 | 69.18 | 69.18 | ||
| mux_fle_9_in_2 | 68.49 | 68.49 | ||
| mux_fle_9_in_3 | 21.70 | 21.70 | ||
| mux_fle_9_in_4 | 43.40 | 43.40 | ||
| mux_fle_9_in_5 | 48.11 | 48.11 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.45 | 58.45 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.48 | 100.00 | 52.44 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 60.05 | 60.05 | grid_clb_4__2_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 100.00 | 100.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 100.00 | 100.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 100.00 | 100.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 100.00 | 100.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 100.00 | 100.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 100.00 | 100.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 100.00 | 100.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 100.00 | 100.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 100.00 | 100.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 100.00 | 100.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.73 | 100.00 | 53.19 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.37 | 100.00 | 52.10 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.95 | 100.00 | 53.85 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.81 | 100.00 | 53.44 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.83 | 100.00 | 53.50 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.48 | 100.00 | 52.44 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.63 | 100.00 | 52.88 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 78.90 | 100.00 | 56.71 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.74 | 100.00 | 62.23 | 80.00 |
| mem_fle_0_cin_0 | 78.69 | 100.00 | 56.06 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 4.55 | 4.55 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 28.77 | 28.77 | ||
| mux_fle_0_in_1 | 28.77 | 28.77 | ||
| mux_fle_0_in_2 | 29.45 | 29.45 | ||
| mux_fle_0_in_3 | 5.66 | 5.66 | ||
| mux_fle_0_in_4 | 6.60 | 6.60 | ||
| mux_fle_0_in_5 | 6.60 | 6.60 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.77 | 28.77 | ||
| mux_fle_1_in_1 | 29.45 | 29.45 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 6.60 | 6.60 | ||
| mux_fle_1_in_4 | 6.60 | 6.60 | ||
| mux_fle_1_in_5 | 6.60 | 6.60 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.77 | 28.77 | ||
| mux_fle_2_in_1 | 28.77 | 28.77 | ||
| mux_fle_2_in_2 | 29.45 | 29.45 | ||
| mux_fle_2_in_3 | 6.60 | 6.60 | ||
| mux_fle_2_in_4 | 6.60 | 6.60 | ||
| mux_fle_2_in_5 | 6.60 | 6.60 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 29.45 | 29.45 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.77 | 28.77 | ||
| mux_fle_3_in_3 | 6.60 | 6.60 | ||
| mux_fle_3_in_4 | 6.60 | 6.60 | ||
| mux_fle_3_in_5 | 6.60 | 6.60 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 29.45 | 29.45 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 6.60 | 6.60 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 5.66 | 5.66 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 29.45 | 29.45 | ||
| mux_fle_5_in_1 | 29.45 | 29.45 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 6.60 | 6.60 | ||
| mux_fle_5_in_4 | 5.66 | 5.66 | ||
| mux_fle_5_in_5 | 6.60 | 6.60 | ||
| mux_fle_6_clk_0 | 64.71 | 64.71 | ||
| mux_fle_6_in_0 | 29.45 | 29.45 | ||
| mux_fle_6_in_1 | 28.77 | 28.77 | ||
| mux_fle_6_in_2 | 29.45 | 29.45 | ||
| mux_fle_6_in_3 | 6.60 | 6.60 | ||
| mux_fle_6_in_4 | 6.60 | 6.60 | ||
| mux_fle_6_in_5 | 6.60 | 6.60 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 29.45 | 29.45 | ||
| mux_fle_7_in_1 | 29.45 | 29.45 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 5.66 | 5.66 | ||
| mux_fle_7_in_4 | 5.66 | 5.66 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 29.45 | 29.45 | ||
| mux_fle_8_in_2 | 29.45 | 29.45 | ||
| mux_fle_8_in_3 | 6.60 | 6.60 | ||
| mux_fle_8_in_4 | 6.60 | 6.60 | ||
| mux_fle_8_in_5 | 5.66 | 5.66 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 29.45 | 29.45 | ||
| mux_fle_9_in_1 | 28.77 | 28.77 | ||
| mux_fle_9_in_2 | 29.45 | 29.45 | ||
| mux_fle_9_in_3 | 22.64 | 22.64 | ||
| mux_fle_9_in_4 | 21.70 | 21.70 | ||
| mux_fle_9_in_5 | 6.60 | 6.60 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.86 | 57.86 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.92 | 100.00 | 50.76 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_4__3_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.33 | 100.00 | 52.00 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.55 | 100.00 | 52.64 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.44 | 100.00 | 52.32 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.32 | 100.00 | 51.96 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.42 | 100.00 | 52.26 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.46 | 100.00 | 52.39 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_9_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 26.03 | 26.03 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 27.40 | 27.40 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 1.89 | 1.89 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 26.71 | 26.71 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 2.83 | 2.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 26.03 | 26.03 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 2.83 | 2.83 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 27.40 | 27.40 | ||
| mux_fle_8_in_3 | 0.94 | 0.94 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 3.77 | 3.77 | ||
| mux_fle_9_clk_0 | 64.71 | 64.71 | ||
| mux_fle_9_in_0 | 26.71 | 26.71 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.23 | 60.23 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.06 | 100.00 | 60.18 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 68.38 | 68.38 | grid_clb_4__4_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.06 | 100.00 | 60.17 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.28 | 100.00 | 60.85 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.38 | 100.00 | 61.13 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.22 | 100.00 | 60.66 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.67 | 100.00 | 62.00 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.81 | 100.00 | 62.44 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.51 | 100.00 | 61.53 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.96 | 100.00 | 62.87 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.09 | 100.00 | 63.28 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.41 | 100.00 | 61.23 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 71.23 | 71.23 | ||
| mux_fle_0_in_1 | 38.36 | 38.36 | ||
| mux_fle_0_in_2 | 71.23 | 71.23 | ||
| mux_fle_0_in_3 | 27.36 | 27.36 | ||
| mux_fle_0_in_4 | 47.17 | 47.17 | ||
| mux_fle_0_in_5 | 26.42 | 26.42 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 50.68 | 50.68 | ||
| mux_fle_1_in_1 | 38.36 | 38.36 | ||
| mux_fle_1_in_2 | 69.86 | 69.86 | ||
| mux_fle_1_in_3 | 27.36 | 27.36 | ||
| mux_fle_1_in_4 | 50.00 | 50.00 | ||
| mux_fle_1_in_5 | 26.42 | 26.42 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 50.00 | 50.00 | ||
| mux_fle_2_in_1 | 39.04 | 39.04 | ||
| mux_fle_2_in_2 | 52.74 | 52.74 | ||
| mux_fle_2_in_3 | 39.62 | 39.62 | ||
| mux_fle_2_in_4 | 53.77 | 53.77 | ||
| mux_fle_2_in_5 | 27.36 | 27.36 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 51.37 | 51.37 | ||
| mux_fle_3_in_1 | 59.59 | 59.59 | ||
| mux_fle_3_in_2 | 54.11 | 54.11 | ||
| mux_fle_3_in_3 | 28.30 | 28.30 | ||
| mux_fle_3_in_4 | 56.60 | 56.60 | ||
| mux_fle_3_in_5 | 26.42 | 26.42 | ||
| mux_fle_4_clk_0 | 64.71 | 64.71 | ||
| mux_fle_4_in_0 | 65.75 | 65.75 | ||
| mux_fle_4_in_1 | 39.04 | 39.04 | ||
| mux_fle_4_in_2 | 53.42 | 53.42 | ||
| mux_fle_4_in_3 | 28.30 | 28.30 | ||
| mux_fle_4_in_4 | 49.06 | 49.06 | ||
| mux_fle_4_in_5 | 27.36 | 27.36 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 58.22 | 58.22 | ||
| mux_fle_5_in_1 | 39.04 | 39.04 | ||
| mux_fle_5_in_2 | 65.75 | 65.75 | ||
| mux_fle_5_in_3 | 28.30 | 28.30 | ||
| mux_fle_5_in_4 | 49.06 | 49.06 | ||
| mux_fle_5_in_5 | 26.42 | 26.42 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 51.37 | 51.37 | ||
| mux_fle_6_in_1 | 60.27 | 60.27 | ||
| mux_fle_6_in_2 | 53.42 | 53.42 | ||
| mux_fle_6_in_3 | 27.36 | 27.36 | ||
| mux_fle_6_in_4 | 58.49 | 58.49 | ||
| mux_fle_6_in_5 | 26.42 | 26.42 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 67.81 | 67.81 | ||
| mux_fle_7_in_1 | 57.53 | 57.53 | ||
| mux_fle_7_in_2 | 52.05 | 52.05 | ||
| mux_fle_7_in_3 | 28.30 | 28.30 | ||
| mux_fle_7_in_4 | 49.06 | 49.06 | ||
| mux_fle_7_in_5 | 27.36 | 27.36 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 71.92 | 71.92 | ||
| mux_fle_8_in_1 | 61.64 | 61.64 | ||
| mux_fle_8_in_2 | 54.11 | 54.11 | ||
| mux_fle_8_in_3 | 28.30 | 28.30 | ||
| mux_fle_8_in_4 | 48.11 | 48.11 | ||
| mux_fle_8_in_5 | 27.36 | 27.36 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 58.90 | 58.90 | ||
| mux_fle_9_in_1 | 37.67 | 37.67 | ||
| mux_fle_9_in_2 | 53.42 | 53.42 | ||
| mux_fle_9_in_3 | 28.30 | 28.30 | ||
| mux_fle_9_in_4 | 54.72 | 54.72 | ||
| mux_fle_9_in_5 | 26.42 | 26.42 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.86 | 57.86 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.93 | 100.00 | 50.80 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_4__5_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.25 | 100.00 | 51.75 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.59 | 100.00 | 52.77 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.33 | 100.00 | 51.98 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.65 | 100.00 | 52.95 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.46 | 100.00 | 52.39 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.53 | 100.00 | 52.59 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.58 | 100.00 | 52.73 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.32 | 100.00 | 51.95 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 26.71 | 26.71 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 26.71 | 26.71 | ||
| mux_fle_0_in_3 | 2.83 | 2.83 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 26.03 | 26.03 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 26.71 | 26.71 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 2.83 | 2.83 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 2.83 | 2.83 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 2.83 | 2.83 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.03 | 58.03 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.05 | 100.00 | 51.16 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_4__6_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.22 | 100.00 | 51.67 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.49 | 100.00 | 52.47 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.26 | 100.00 | 51.78 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.58 | 100.00 | 52.75 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.39 | 100.00 | 52.16 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 79.08 | 100.00 | 57.24 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_8_in_2 | 76.87 | 100.00 | 50.62 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 3.77 | 3.77 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 2.83 | 2.83 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 64.71 | 64.71 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 26.03 | 26.03 | ||
| mux_fle_6_in_1 | 26.71 | 26.71 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 2.83 | 2.83 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 27.40 | 27.40 | ||
| mux_fle_8_in_1 | 25.34 | 25.34 | ||
| mux_fle_8_in_2 | 24.66 | 24.66 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 26.71 | 26.71 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 2.83 | 2.83 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.75 | 61.75 |
| SCORE | LINE | TOGGLE | BRANCH |
| 81.32 | 100.00 | 63.95 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 72.79 | 72.79 | grid_clb_4__7_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 81.09 | 100.00 | 63.26 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.57 | 100.00 | 64.70 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.63 | 100.00 | 64.88 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.95 | 100.00 | 65.85 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.86 | 100.00 | 65.57 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.52 | 100.00 | 64.57 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.77 | 100.00 | 65.31 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.50 | 100.00 | 64.49 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.70 | 100.00 | 65.11 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.03 | 100.00 | 63.10 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_6_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 52.74 | 52.74 | ||
| mux_fle_0_in_1 | 65.75 | 65.75 | ||
| mux_fle_0_in_2 | 71.23 | 71.23 | ||
| mux_fle_0_in_3 | 62.26 | 62.26 | ||
| mux_fle_0_in_4 | 47.17 | 47.17 | ||
| mux_fle_0_in_5 | 48.11 | 48.11 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 65.75 | 65.75 | ||
| mux_fle_1_in_1 | 63.01 | 63.01 | ||
| mux_fle_1_in_2 | 71.92 | 71.92 | ||
| mux_fle_1_in_3 | 60.38 | 60.38 | ||
| mux_fle_1_in_4 | 58.49 | 58.49 | ||
| mux_fle_1_in_5 | 48.11 | 48.11 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 63.01 | 63.01 | ||
| mux_fle_2_in_1 | 73.29 | 73.29 | ||
| mux_fle_2_in_2 | 65.75 | 65.75 | ||
| mux_fle_2_in_3 | 59.43 | 59.43 | ||
| mux_fle_2_in_4 | 55.66 | 55.66 | ||
| mux_fle_2_in_5 | 48.11 | 48.11 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 71.23 | 71.23 | ||
| mux_fle_3_in_1 | 76.03 | 76.03 | ||
| mux_fle_3_in_2 | 62.33 | 62.33 | ||
| mux_fle_3_in_3 | 59.43 | 59.43 | ||
| mux_fle_3_in_4 | 58.49 | 58.49 | ||
| mux_fle_3_in_5 | 48.11 | 48.11 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 65.75 | 65.75 | ||
| mux_fle_4_in_1 | 68.49 | 68.49 | ||
| mux_fle_4_in_2 | 64.38 | 64.38 | ||
| mux_fle_4_in_3 | 63.21 | 63.21 | ||
| mux_fle_4_in_4 | 58.49 | 58.49 | ||
| mux_fle_4_in_5 | 47.17 | 47.17 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 63.70 | 63.70 | ||
| mux_fle_5_in_1 | 67.81 | 67.81 | ||
| mux_fle_5_in_2 | 67.81 | 67.81 | ||
| mux_fle_5_in_3 | 60.38 | 60.38 | ||
| mux_fle_5_in_4 | 46.23 | 46.23 | ||
| mux_fle_5_in_5 | 48.11 | 48.11 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 70.55 | 70.55 | ||
| mux_fle_6_in_1 | 71.92 | 71.92 | ||
| mux_fle_6_in_2 | 56.85 | 56.85 | ||
| mux_fle_6_in_3 | 61.32 | 61.32 | ||
| mux_fle_6_in_4 | 59.43 | 59.43 | ||
| mux_fle_6_in_5 | 47.17 | 47.17 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 71.92 | 71.92 | ||
| mux_fle_7_in_1 | 76.03 | 76.03 | ||
| mux_fle_7_in_2 | 57.53 | 57.53 | ||
| mux_fle_7_in_3 | 55.66 | 55.66 | ||
| mux_fle_7_in_4 | 47.17 | 47.17 | ||
| mux_fle_7_in_5 | 46.23 | 46.23 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 62.33 | 62.33 | ||
| mux_fle_8_in_1 | 74.66 | 74.66 | ||
| mux_fle_8_in_2 | 56.85 | 56.85 | ||
| mux_fle_8_in_3 | 63.21 | 63.21 | ||
| mux_fle_8_in_4 | 47.17 | 47.17 | ||
| mux_fle_8_in_5 | 48.11 | 48.11 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 64.38 | 64.38 | ||
| mux_fle_9_in_1 | 69.18 | 69.18 | ||
| mux_fle_9_in_2 | 61.64 | 61.64 | ||
| mux_fle_9_in_3 | 60.38 | 60.38 | ||
| mux_fle_9_in_4 | 55.66 | 55.66 | ||
| mux_fle_9_in_5 | 45.28 | 45.28 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.25 | 60.25 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.09 | 100.00 | 60.28 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 68.38 | 68.38 | grid_clb_4__8_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.12 | 100.00 | 60.36 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.71 | 100.00 | 62.12 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.57 | 100.00 | 61.72 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.83 | 100.00 | 62.48 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.56 | 100.00 | 61.69 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.48 | 100.00 | 61.44 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.20 | 100.00 | 60.61 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.05 | 100.00 | 63.16 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.75 | 100.00 | 62.26 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 81.20 | 100.00 | 63.59 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_7_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 43.84 | 43.84 | ||
| mux_fle_0_in_1 | 65.07 | 65.07 | ||
| mux_fle_0_in_2 | 54.11 | 54.11 | ||
| mux_fle_0_in_3 | 23.58 | 23.58 | ||
| mux_fle_0_in_4 | 41.51 | 41.51 | ||
| mux_fle_0_in_5 | 45.28 | 45.28 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 54.11 | 54.11 | ||
| mux_fle_1_in_1 | 56.16 | 56.16 | ||
| mux_fle_1_in_2 | 54.11 | 54.11 | ||
| mux_fle_1_in_3 | 31.13 | 31.13 | ||
| mux_fle_1_in_4 | 22.64 | 22.64 | ||
| mux_fle_1_in_5 | 45.28 | 45.28 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 43.15 | 43.15 | ||
| mux_fle_2_in_1 | 55.48 | 55.48 | ||
| mux_fle_2_in_2 | 68.49 | 68.49 | ||
| mux_fle_2_in_3 | 29.25 | 29.25 | ||
| mux_fle_2_in_4 | 22.64 | 22.64 | ||
| mux_fle_2_in_5 | 45.28 | 45.28 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 51.37 | 51.37 | ||
| mux_fle_3_in_1 | 55.48 | 55.48 | ||
| mux_fle_3_in_2 | 54.11 | 54.11 | ||
| mux_fle_3_in_3 | 29.25 | 29.25 | ||
| mux_fle_3_in_4 | 22.64 | 22.64 | ||
| mux_fle_3_in_5 | 44.34 | 44.34 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 43.84 | 43.84 | ||
| mux_fle_4_in_1 | 61.64 | 61.64 | ||
| mux_fle_4_in_2 | 54.79 | 54.79 | ||
| mux_fle_4_in_3 | 29.25 | 29.25 | ||
| mux_fle_4_in_4 | 22.64 | 22.64 | ||
| mux_fle_4_in_5 | 45.28 | 45.28 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 43.84 | 43.84 | ||
| mux_fle_5_in_1 | 64.38 | 64.38 | ||
| mux_fle_5_in_2 | 60.27 | 60.27 | ||
| mux_fle_5_in_3 | 22.64 | 22.64 | ||
| mux_fle_5_in_4 | 21.70 | 21.70 | ||
| mux_fle_5_in_5 | 44.34 | 44.34 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 43.84 | 43.84 | ||
| mux_fle_6_in_1 | 65.07 | 65.07 | ||
| mux_fle_6_in_2 | 54.11 | 54.11 | ||
| mux_fle_6_in_3 | 24.53 | 24.53 | ||
| mux_fle_6_in_4 | 42.45 | 42.45 | ||
| mux_fle_6_in_5 | 45.28 | 45.28 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 53.42 | 53.42 | ||
| mux_fle_7_in_1 | 62.33 | 62.33 | ||
| mux_fle_7_in_2 | 54.11 | 54.11 | ||
| mux_fle_7_in_3 | 24.53 | 24.53 | ||
| mux_fle_7_in_4 | 19.81 | 19.81 | ||
| mux_fle_7_in_5 | 43.40 | 43.40 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 43.15 | 43.15 | ||
| mux_fle_8_in_1 | 65.07 | 65.07 | ||
| mux_fle_8_in_2 | 54.79 | 54.79 | ||
| mux_fle_8_in_3 | 31.13 | 31.13 | ||
| mux_fle_8_in_4 | 20.75 | 20.75 | ||
| mux_fle_8_in_5 | 45.28 | 45.28 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 43.15 | 43.15 | ||
| mux_fle_9_in_1 | 55.48 | 55.48 | ||
| mux_fle_9_in_2 | 69.86 | 69.86 | ||
| mux_fle_9_in_3 | 24.53 | 24.53 | ||
| mux_fle_9_in_4 | 36.79 | 36.79 | ||
| mux_fle_9_in_5 | 44.34 | 44.34 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.03 | 58.03 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.97 | 100.00 | 50.91 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_4__9_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.51 | 100.00 | 52.52 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.37 | 100.00 | 52.11 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.19 | 100.00 | 51.56 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.49 | 100.00 | 52.46 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.81 | 100.00 | 53.42 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.48 | 100.00 | 52.44 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.43 | 100.00 | 52.28 | 80.00 |
| mem_fle_0_cin_0 | 78.69 | 100.00 | 56.06 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 13.64 | 13.64 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 2.83 | 2.83 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 27.40 | 27.40 | ||
| mux_fle_1_in_3 | 2.83 | 2.83 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 26.71 | 26.71 | ||
| mux_fle_2_in_2 | 26.71 | 26.71 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 26.71 | 26.71 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 27.40 | 27.40 | ||
| mux_fle_8_in_1 | 26.71 | 26.71 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 2.83 | 2.83 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.60 | 59.60 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.48 | 100.00 | 58.44 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 61.03 | 61.03 | grid_clb_4__10_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.23 | 100.00 | 60.69 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.61 | 100.00 | 61.84 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.84 | 100.00 | 62.52 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.66 | 100.00 | 61.97 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.67 | 100.00 | 62.02 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.67 | 100.00 | 62.00 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.82 | 100.00 | 62.46 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.93 | 100.00 | 62.79 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.78 | 100.00 | 62.34 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.68 | 100.00 | 62.05 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_4_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 41.78 | 41.78 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 32.19 | 32.19 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 32.08 | 32.08 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 36.99 | 36.99 | ||
| mux_fle_1_in_1 | 36.30 | 36.30 | ||
| mux_fle_1_in_2 | 32.19 | 32.19 | ||
| mux_fle_1_in_3 | 3.77 | 3.77 | ||
| mux_fle_1_in_4 | 12.26 | 12.26 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 45.21 | 45.21 | ||
| mux_fle_2_in_1 | 33.56 | 33.56 | ||
| mux_fle_2_in_2 | 32.88 | 32.88 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 10.38 | 10.38 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 33.56 | 33.56 | ||
| mux_fle_3_in_1 | 31.51 | 31.51 | ||
| mux_fle_3_in_2 | 45.89 | 45.89 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 11.32 | 11.32 | ||
| mux_fle_3_in_5 | 4.72 | 4.72 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 31.51 | 31.51 | ||
| mux_fle_4_in_1 | 35.62 | 35.62 | ||
| mux_fle_4_in_2 | 39.73 | 39.73 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 12.26 | 12.26 | ||
| mux_fle_4_in_5 | 3.77 | 3.77 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 32.88 | 32.88 | ||
| mux_fle_5_in_1 | 34.25 | 34.25 | ||
| mux_fle_5_in_2 | 50.00 | 50.00 | ||
| mux_fle_5_in_3 | 2.83 | 2.83 | ||
| mux_fle_5_in_4 | 11.32 | 11.32 | ||
| mux_fle_5_in_5 | 3.77 | 3.77 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 51.37 | 51.37 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 43.15 | 43.15 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 12.26 | 12.26 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 45.89 | 45.89 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 39.04 | 39.04 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 11.32 | 11.32 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 33.56 | 33.56 | ||
| mux_fle_8_in_1 | 36.30 | 36.30 | ||
| mux_fle_8_in_2 | 42.47 | 42.47 | ||
| mux_fle_8_in_3 | 2.83 | 2.83 | ||
| mux_fle_8_in_4 | 11.32 | 11.32 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 33.56 | 33.56 | ||
| mux_fle_9_in_1 | 34.93 | 34.93 | ||
| mux_fle_9_in_2 | 45.21 | 45.21 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 12.26 | 12.26 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.47 | 59.47 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.49 | 100.00 | 58.46 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 67.89 | 67.89 | grid_clb_4__11_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.52 | 100.00 | 52.57 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.11 | 100.00 | 60.33 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 79.94 | 100.00 | 59.82 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.07 | 100.00 | 60.20 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 79.83 | 100.00 | 59.50 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 79.96 | 100.00 | 59.89 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.25 | 100.00 | 60.76 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 79.46 | 100.00 | 58.38 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.27 | 100.00 | 60.81 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.34 | 100.00 | 61.02 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 50.00 | 50.00 | ||
| mux_fle_0_in_1 | 57.53 | 57.53 | ||
| mux_fle_0_in_2 | 63.70 | 63.70 | ||
| mux_fle_0_in_3 | 19.81 | 19.81 | ||
| mux_fle_0_in_4 | 25.47 | 25.47 | ||
| mux_fle_0_in_5 | 38.68 | 38.68 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 56.16 | 56.16 | ||
| mux_fle_1_in_1 | 58.22 | 58.22 | ||
| mux_fle_1_in_2 | 63.70 | 63.70 | ||
| mux_fle_1_in_3 | 19.81 | 19.81 | ||
| mux_fle_1_in_4 | 40.57 | 40.57 | ||
| mux_fle_1_in_5 | 39.62 | 39.62 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 50.00 | 50.00 | ||
| mux_fle_2_in_1 | 66.44 | 66.44 | ||
| mux_fle_2_in_2 | 63.01 | 63.01 | ||
| mux_fle_2_in_3 | 29.25 | 29.25 | ||
| mux_fle_2_in_4 | 24.53 | 24.53 | ||
| mux_fle_2_in_5 | 40.57 | 40.57 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 50.00 | 50.00 | ||
| mux_fle_3_in_1 | 65.75 | 65.75 | ||
| mux_fle_3_in_2 | 71.23 | 71.23 | ||
| mux_fle_3_in_3 | 18.87 | 18.87 | ||
| mux_fle_3_in_4 | 26.42 | 26.42 | ||
| mux_fle_3_in_5 | 40.57 | 40.57 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 50.00 | 50.00 | ||
| mux_fle_4_in_1 | 58.22 | 58.22 | ||
| mux_fle_4_in_2 | 69.18 | 69.18 | ||
| mux_fle_4_in_3 | 19.81 | 19.81 | ||
| mux_fle_4_in_4 | 34.91 | 34.91 | ||
| mux_fle_4_in_5 | 39.62 | 39.62 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 50.00 | 50.00 | ||
| mux_fle_5_in_1 | 70.55 | 70.55 | ||
| mux_fle_5_in_2 | 71.23 | 71.23 | ||
| mux_fle_5_in_3 | 17.92 | 17.92 | ||
| mux_fle_5_in_4 | 27.36 | 27.36 | ||
| mux_fle_5_in_5 | 40.57 | 40.57 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 50.68 | 50.68 | ||
| mux_fle_6_in_1 | 58.22 | 58.22 | ||
| mux_fle_6_in_2 | 66.44 | 66.44 | ||
| mux_fle_6_in_3 | 19.81 | 19.81 | ||
| mux_fle_6_in_4 | 27.36 | 27.36 | ||
| mux_fle_6_in_5 | 39.62 | 39.62 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 50.00 | 50.00 | ||
| mux_fle_7_in_1 | 58.22 | 58.22 | ||
| mux_fle_7_in_2 | 63.01 | 63.01 | ||
| mux_fle_7_in_3 | 29.25 | 29.25 | ||
| mux_fle_7_in_4 | 33.02 | 33.02 | ||
| mux_fle_7_in_5 | 39.62 | 39.62 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 54.79 | 54.79 | ||
| mux_fle_8_in_1 | 63.70 | 63.70 | ||
| mux_fle_8_in_2 | 63.70 | 63.70 | ||
| mux_fle_8_in_3 | 19.81 | 19.81 | ||
| mux_fle_8_in_4 | 26.42 | 26.42 | ||
| mux_fle_8_in_5 | 40.57 | 40.57 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 50.00 | 50.00 | ||
| mux_fle_9_in_1 | 70.55 | 70.55 | ||
| mux_fle_9_in_2 | 63.01 | 63.01 | ||
| mux_fle_9_in_3 | 19.81 | 19.81 | ||
| mux_fle_9_in_4 | 42.45 | 42.45 | ||
| mux_fle_9_in_5 | 39.62 | 39.62 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.12 | 60.12 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.17 | 100.00 | 60.51 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 68.38 | 68.38 | grid_clb_4__12_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.54 | 100.00 | 61.61 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.53 | 100.00 | 61.59 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.20 | 100.00 | 60.61 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.54 | 100.00 | 61.61 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.69 | 100.00 | 62.07 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.69 | 100.00 | 62.07 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.62 | 100.00 | 61.85 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.98 | 100.00 | 62.93 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.96 | 100.00 | 62.87 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.91 | 100.00 | 62.72 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 77.49 | 100.00 | 52.47 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 48.63 | 48.63 | ||
| mux_fle_0_in_1 | 56.16 | 56.16 | ||
| mux_fle_0_in_2 | 71.23 | 71.23 | ||
| mux_fle_0_in_3 | 20.75 | 20.75 | ||
| mux_fle_0_in_4 | 38.68 | 38.68 | ||
| mux_fle_0_in_5 | 22.64 | 22.64 | ||
| mux_fle_1_clk_0 | 64.71 | 64.71 | ||
| mux_fle_1_in_0 | 48.63 | 48.63 | ||
| mux_fle_1_in_1 | 52.05 | 52.05 | ||
| mux_fle_1_in_2 | 76.71 | 76.71 | ||
| mux_fle_1_in_3 | 21.70 | 21.70 | ||
| mux_fle_1_in_4 | 53.77 | 53.77 | ||
| mux_fle_1_in_5 | 24.53 | 24.53 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 50.00 | 50.00 | ||
| mux_fle_2_in_1 | 52.74 | 52.74 | ||
| mux_fle_2_in_2 | 65.75 | 65.75 | ||
| mux_fle_2_in_3 | 30.19 | 30.19 | ||
| mux_fle_2_in_4 | 43.40 | 43.40 | ||
| mux_fle_2_in_5 | 21.70 | 21.70 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 50.00 | 50.00 | ||
| mux_fle_3_in_1 | 60.27 | 60.27 | ||
| mux_fle_3_in_2 | 65.07 | 65.07 | ||
| mux_fle_3_in_3 | 23.58 | 23.58 | ||
| mux_fle_3_in_4 | 50.00 | 50.00 | ||
| mux_fle_3_in_5 | 24.53 | 24.53 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 62.33 | 62.33 | ||
| mux_fle_4_in_1 | 51.37 | 51.37 | ||
| mux_fle_4_in_2 | 65.07 | 65.07 | ||
| mux_fle_4_in_3 | 21.70 | 21.70 | ||
| mux_fle_4_in_4 | 52.83 | 52.83 | ||
| mux_fle_4_in_5 | 25.47 | 25.47 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 63.01 | 63.01 | ||
| mux_fle_5_in_1 | 52.74 | 52.74 | ||
| mux_fle_5_in_2 | 76.71 | 76.71 | ||
| mux_fle_5_in_3 | 23.58 | 23.58 | ||
| mux_fle_5_in_4 | 40.57 | 40.57 | ||
| mux_fle_5_in_5 | 24.53 | 24.53 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 48.63 | 48.63 | ||
| mux_fle_6_in_1 | 60.27 | 60.27 | ||
| mux_fle_6_in_2 | 63.70 | 63.70 | ||
| mux_fle_6_in_3 | 23.58 | 23.58 | ||
| mux_fle_6_in_4 | 45.28 | 45.28 | ||
| mux_fle_6_in_5 | 23.58 | 23.58 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 66.44 | 66.44 | ||
| mux_fle_7_in_1 | 63.01 | 63.01 | ||
| mux_fle_7_in_2 | 65.75 | 65.75 | ||
| mux_fle_7_in_3 | 23.58 | 23.58 | ||
| mux_fle_7_in_4 | 41.51 | 41.51 | ||
| mux_fle_7_in_5 | 25.47 | 25.47 | ||
| mux_fle_8_clk_0 | 64.71 | 64.71 | ||
| mux_fle_8_in_0 | 63.01 | 63.01 | ||
| mux_fle_8_in_1 | 62.33 | 62.33 | ||
| mux_fle_8_in_2 | 65.75 | 65.75 | ||
| mux_fle_8_in_3 | 23.58 | 23.58 | ||
| mux_fle_8_in_4 | 41.51 | 41.51 | ||
| mux_fle_8_in_5 | 25.47 | 25.47 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 65.75 | 65.75 | ||
| mux_fle_9_in_1 | 52.74 | 52.74 | ||
| mux_fle_9_in_2 | 65.75 | 65.75 | ||
| mux_fle_9_in_3 | 35.85 | 35.85 | ||
| mux_fle_9_in_4 | 50.00 | 50.00 | ||
| mux_fle_9_in_5 | 24.53 | 24.53 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.32 | 59.32 |
| SCORE | LINE | TOGGLE | BRANCH |
| 78.75 | 100.00 | 56.26 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 66.42 | 66.42 | grid_clb_5__1_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.27 | 100.00 | 51.80 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 79.08 | 100.00 | 57.25 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.79 | 100.00 | 53.37 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.69 | 100.00 | 53.08 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.65 | 100.00 | 52.95 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.75 | 100.00 | 53.24 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.31 | 100.00 | 63.93 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.29 | 100.00 | 63.87 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 82.37 | 100.00 | 67.11 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_5 | 82.43 | 100.00 | 67.28 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 44.52 | 44.52 | ||
| mux_fle_0_in_1 | 52.74 | 52.74 | ||
| mux_fle_0_in_2 | 45.89 | 45.89 | ||
| mux_fle_0_in_3 | 29.25 | 29.25 | ||
| mux_fle_0_in_4 | 19.81 | 19.81 | ||
| mux_fle_0_in_5 | 30.19 | 30.19 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 48.63 | 48.63 | ||
| mux_fle_1_in_1 | 52.05 | 52.05 | ||
| mux_fle_1_in_2 | 45.21 | 45.21 | ||
| mux_fle_1_in_3 | 27.36 | 27.36 | ||
| mux_fle_1_in_4 | 18.87 | 18.87 | ||
| mux_fle_1_in_5 | 31.13 | 31.13 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 44.52 | 44.52 | ||
| mux_fle_2_in_1 | 51.37 | 51.37 | ||
| mux_fle_2_in_2 | 44.52 | 44.52 | ||
| mux_fle_2_in_3 | 29.25 | 29.25 | ||
| mux_fle_2_in_4 | 19.81 | 19.81 | ||
| mux_fle_2_in_5 | 30.19 | 30.19 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 45.89 | 45.89 | ||
| mux_fle_3_in_1 | 52.74 | 52.74 | ||
| mux_fle_3_in_2 | 44.52 | 44.52 | ||
| mux_fle_3_in_3 | 29.25 | 29.25 | ||
| mux_fle_3_in_4 | 19.81 | 19.81 | ||
| mux_fle_3_in_5 | 30.19 | 30.19 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 45.89 | 45.89 | ||
| mux_fle_4_in_1 | 52.05 | 52.05 | ||
| mux_fle_4_in_2 | 45.21 | 45.21 | ||
| mux_fle_4_in_3 | 28.30 | 28.30 | ||
| mux_fle_4_in_4 | 19.81 | 19.81 | ||
| mux_fle_4_in_5 | 30.19 | 30.19 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 45.89 | 45.89 | ||
| mux_fle_5_in_1 | 52.74 | 52.74 | ||
| mux_fle_5_in_2 | 45.89 | 45.89 | ||
| mux_fle_5_in_3 | 26.42 | 26.42 | ||
| mux_fle_5_in_4 | 17.92 | 17.92 | ||
| mux_fle_5_in_5 | 30.19 | 30.19 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 45.89 | 45.89 | ||
| mux_fle_6_in_1 | 52.74 | 52.74 | ||
| mux_fle_6_in_2 | 45.89 | 45.89 | ||
| mux_fle_6_in_3 | 28.30 | 28.30 | ||
| mux_fle_6_in_4 | 18.87 | 18.87 | ||
| mux_fle_6_in_5 | 29.25 | 29.25 | ||
| mux_fle_7_clk_0 | 64.71 | 64.71 | ||
| mux_fle_7_in_0 | 54.11 | 54.11 | ||
| mux_fle_7_in_1 | 58.90 | 58.90 | ||
| mux_fle_7_in_2 | 56.85 | 56.85 | ||
| mux_fle_7_in_3 | 36.79 | 36.79 | ||
| mux_fle_7_in_4 | 31.13 | 31.13 | ||
| mux_fle_7_in_5 | 47.17 | 47.17 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 45.89 | 45.89 | ||
| mux_fle_8_in_1 | 60.96 | 60.96 | ||
| mux_fle_8_in_2 | 54.79 | 54.79 | ||
| mux_fle_8_in_3 | 37.74 | 37.74 | ||
| mux_fle_8_in_4 | 33.96 | 33.96 | ||
| mux_fle_8_in_5 | 30.19 | 30.19 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 58.90 | 58.90 | ||
| mux_fle_9_in_1 | 64.38 | 64.38 | ||
| mux_fle_9_in_2 | 57.53 | 57.53 | ||
| mux_fle_9_in_3 | 36.79 | 36.79 | ||
| mux_fle_9_in_4 | 47.17 | 47.17 | ||
| mux_fle_9_in_5 | 34.91 | 34.91 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.28 | 60.28 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.07 | 100.00 | 60.21 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 68.14 | 68.14 | grid_clb_5__2_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.50 | 100.00 | 61.49 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.27 | 100.00 | 60.82 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.29 | 100.00 | 60.87 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.65 | 100.00 | 61.94 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.51 | 100.00 | 61.54 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.50 | 100.00 | 61.51 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.83 | 100.00 | 62.49 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.80 | 100.00 | 62.39 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.87 | 100.00 | 62.61 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.65 | 100.00 | 61.94 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_9_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 64.71 | 64.71 | ||
| mux_fle_0_in_0 | 52.74 | 52.74 | ||
| mux_fle_0_in_1 | 58.90 | 58.90 | ||
| mux_fle_0_in_2 | 67.12 | 67.12 | ||
| mux_fle_0_in_3 | 18.87 | 18.87 | ||
| mux_fle_0_in_4 | 33.96 | 33.96 | ||
| mux_fle_0_in_5 | 32.08 | 32.08 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 52.74 | 52.74 | ||
| mux_fle_1_in_1 | 46.58 | 46.58 | ||
| mux_fle_1_in_2 | 67.12 | 67.12 | ||
| mux_fle_1_in_3 | 19.81 | 19.81 | ||
| mux_fle_1_in_4 | 44.34 | 44.34 | ||
| mux_fle_1_in_5 | 33.02 | 33.02 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 52.05 | 52.05 | ||
| mux_fle_2_in_1 | 45.89 | 45.89 | ||
| mux_fle_2_in_2 | 56.16 | 56.16 | ||
| mux_fle_2_in_3 | 28.30 | 28.30 | ||
| mux_fle_2_in_4 | 48.11 | 48.11 | ||
| mux_fle_2_in_5 | 32.08 | 32.08 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 52.74 | 52.74 | ||
| mux_fle_3_in_1 | 60.27 | 60.27 | ||
| mux_fle_3_in_2 | 56.16 | 56.16 | ||
| mux_fle_3_in_3 | 19.81 | 19.81 | ||
| mux_fle_3_in_4 | 50.94 | 50.94 | ||
| mux_fle_3_in_5 | 31.13 | 31.13 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 60.96 | 60.96 | ||
| mux_fle_4_in_1 | 46.58 | 46.58 | ||
| mux_fle_4_in_2 | 55.48 | 55.48 | ||
| mux_fle_4_in_3 | 18.87 | 18.87 | ||
| mux_fle_4_in_4 | 51.89 | 51.89 | ||
| mux_fle_4_in_5 | 33.02 | 33.02 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 61.64 | 61.64 | ||
| mux_fle_5_in_1 | 45.89 | 45.89 | ||
| mux_fle_5_in_2 | 71.23 | 71.23 | ||
| mux_fle_5_in_3 | 20.75 | 20.75 | ||
| mux_fle_5_in_4 | 33.96 | 33.96 | ||
| mux_fle_5_in_5 | 32.08 | 32.08 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 52.74 | 52.74 | ||
| mux_fle_6_in_1 | 53.42 | 53.42 | ||
| mux_fle_6_in_2 | 56.16 | 56.16 | ||
| mux_fle_6_in_3 | 20.75 | 20.75 | ||
| mux_fle_6_in_4 | 43.40 | 43.40 | ||
| mux_fle_6_in_5 | 33.02 | 33.02 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 63.01 | 63.01 | ||
| mux_fle_7_in_1 | 55.48 | 55.48 | ||
| mux_fle_7_in_2 | 55.48 | 55.48 | ||
| mux_fle_7_in_3 | 20.75 | 20.75 | ||
| mux_fle_7_in_4 | 33.96 | 33.96 | ||
| mux_fle_7_in_5 | 33.02 | 33.02 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 58.22 | 58.22 | ||
| mux_fle_8_in_1 | 58.22 | 58.22 | ||
| mux_fle_8_in_2 | 55.48 | 55.48 | ||
| mux_fle_8_in_3 | 20.75 | 20.75 | ||
| mux_fle_8_in_4 | 33.02 | 33.02 | ||
| mux_fle_8_in_5 | 32.08 | 32.08 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 57.53 | 57.53 | ||
| mux_fle_9_in_1 | 45.89 | 45.89 | ||
| mux_fle_9_in_2 | 55.48 | 55.48 | ||
| mux_fle_9_in_3 | 18.87 | 18.87 | ||
| mux_fle_9_in_4 | 48.11 | 48.11 | ||
| mux_fle_9_in_5 | 33.02 | 33.02 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.13 | 58.13 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.00 | 100.00 | 51.01 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_5__3_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.19 | 100.00 | 51.57 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.64 | 100.00 | 52.91 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.44 | 100.00 | 52.31 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.61 | 100.00 | 52.83 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.67 | 100.00 | 53.00 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.56 | 100.00 | 52.67 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.53 | 100.00 | 52.60 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.64 | 100.00 | 52.91 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 3.77 | 3.77 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 26.71 | 26.71 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.94 | 57.94 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.99 | 100.00 | 50.96 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_5__4_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.17 | 100.00 | 51.51 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.56 | 100.00 | 52.67 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.46 | 100.00 | 52.37 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.62 | 100.00 | 52.87 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.71 | 100.00 | 53.14 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.72 | 100.00 | 53.16 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.68 | 100.00 | 53.03 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.43 | 100.00 | 52.29 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.33 | 100.00 | 52.00 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.76 | 100.00 | 53.27 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 27.40 | 27.40 | ||
| mux_fle_0_in_1 | 27.40 | 27.40 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 3.77 | 3.77 | ||
| mux_fle_0_in_4 | 2.83 | 2.83 | ||
| mux_fle_0_in_5 | 3.77 | 3.77 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 26.71 | 26.71 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 2.83 | 2.83 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 1.89 | 1.89 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 3.77 | 3.77 | ||
| mux_fle_4_in_4 | 3.77 | 3.77 | ||
| mux_fle_4_in_5 | 2.83 | 2.83 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 1.89 | 1.89 | ||
| mux_fle_5_in_4 | 3.77 | 3.77 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 4.72 | 4.72 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 28.08 | 28.08 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 3.77 | 3.77 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 26.71 | 26.71 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 2.83 | 2.83 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 27.40 | 27.40 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 58.02 | 58.02 |
| SCORE | LINE | TOGGLE | BRANCH |
| 77.01 | 100.00 | 51.03 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_5__5_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.61 | 100.00 | 52.82 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.51 | 100.00 | 52.52 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.29 | 100.00 | 51.88 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.56 | 100.00 | 52.67 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.67 | 100.00 | 53.01 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.74 | 100.00 | 53.21 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.68 | 100.00 | 53.05 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.49 | 100.00 | 52.47 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.50 | 100.00 | 52.49 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 27.40 | 27.40 | ||
| mux_fle_0_in_3 | 2.83 | 2.83 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 3.77 | 3.77 | ||
| mux_fle_1_in_5 | 2.83 | 2.83 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 28.08 | 28.08 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 2.83 | 2.83 | ||
| mux_fle_3_in_4 | 2.83 | 2.83 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 28.08 | 28.08 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 2.83 | 2.83 | ||
| mux_fle_4_in_4 | 2.83 | 2.83 | ||
| mux_fle_4_in_5 | 3.77 | 3.77 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 4.72 | 4.72 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 27.40 | 27.40 | ||
| mux_fle_6_in_1 | 26.71 | 26.71 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 27.40 | 27.40 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 27.40 | 27.40 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 28.08 | 28.08 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 3.77 | 3.77 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.95 | 57.95 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.96 | 100.00 | 50.87 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_5__6_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.22 | 100.00 | 51.65 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.54 | 100.00 | 52.62 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.52 | 100.00 | 52.57 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.46 | 100.00 | 52.37 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.60 | 100.00 | 52.80 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.64 | 100.00 | 52.93 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.38 | 100.00 | 52.14 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.56 | 100.00 | 52.67 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.56 | 100.00 | 52.67 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 28.08 | 28.08 | ||
| mux_fle_0_in_3 | 2.83 | 2.83 | ||
| mux_fle_0_in_4 | 3.77 | 3.77 | ||
| mux_fle_0_in_5 | 2.83 | 2.83 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 27.40 | 27.40 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 26.71 | 26.71 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 2.83 | 2.83 | ||
| mux_fle_2_in_5 | 3.77 | 3.77 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 3.77 | 3.77 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 26.71 | 26.71 | ||
| mux_fle_4_in_1 | 26.71 | 26.71 | ||
| mux_fle_4_in_2 | 27.40 | 27.40 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 2.83 | 2.83 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 28.08 | 28.08 | ||
| mux_fle_5_in_1 | 27.40 | 27.40 | ||
| mux_fle_5_in_2 | 28.08 | 28.08 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 2.83 | 2.83 | ||
| mux_fle_5_in_5 | 2.83 | 2.83 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 28.08 | 28.08 | ||
| mux_fle_6_in_2 | 28.08 | 28.08 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 4.72 | 4.72 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 2.83 | 2.83 | ||
| mux_fle_7_in_4 | 3.77 | 3.77 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 26.71 | 26.71 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 2.83 | 2.83 | ||
| mux_fle_8_in_5 | 4.72 | 4.72 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 28.08 | 28.08 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 4.72 | 4.72 | ||
| mux_fle_9_in_4 | 4.72 | 4.72 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 60.20 | 60.20 |
| SCORE | LINE | TOGGLE | BRANCH |
| 79.97 | 100.00 | 59.92 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 65.93 | 65.93 | grid_clb_5__7_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.68 | 100.00 | 62.05 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.86 | 100.00 | 62.59 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.63 | 100.00 | 61.90 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.59 | 100.00 | 61.76 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.14 | 100.00 | 63.43 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.73 | 100.00 | 62.20 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.74 | 100.00 | 62.23 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.93 | 100.00 | 62.80 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.69 | 100.00 | 62.07 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.46 | 100.00 | 61.39 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_4_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_1 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 45.45 | 45.45 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 47.26 | 47.26 | ||
| mux_fle_0_in_1 | 52.74 | 52.74 | ||
| mux_fle_0_in_2 | 50.00 | 50.00 | ||
| mux_fle_0_in_3 | 22.64 | 22.64 | ||
| mux_fle_0_in_4 | 19.81 | 19.81 | ||
| mux_fle_0_in_5 | 31.13 | 31.13 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 40.41 | 40.41 | ||
| mux_fle_1_in_1 | 53.42 | 53.42 | ||
| mux_fle_1_in_2 | 51.37 | 51.37 | ||
| mux_fle_1_in_3 | 20.75 | 20.75 | ||
| mux_fle_1_in_4 | 17.92 | 17.92 | ||
| mux_fle_1_in_5 | 29.25 | 29.25 | ||
| mux_fle_2_clk_0 | 67.65 | 67.65 | ||
| mux_fle_2_in_0 | 36.99 | 36.99 | ||
| mux_fle_2_in_1 | 54.11 | 54.11 | ||
| mux_fle_2_in_2 | 50.68 | 50.68 | ||
| mux_fle_2_in_3 | 23.58 | 23.58 | ||
| mux_fle_2_in_4 | 19.81 | 19.81 | ||
| mux_fle_2_in_5 | 30.19 | 30.19 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 43.15 | 43.15 | ||
| mux_fle_3_in_1 | 52.05 | 52.05 | ||
| mux_fle_3_in_2 | 56.85 | 56.85 | ||
| mux_fle_3_in_3 | 19.81 | 19.81 | ||
| mux_fle_3_in_4 | 19.81 | 19.81 | ||
| mux_fle_3_in_5 | 31.13 | 31.13 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 43.84 | 43.84 | ||
| mux_fle_4_in_1 | 51.37 | 51.37 | ||
| mux_fle_4_in_2 | 54.11 | 54.11 | ||
| mux_fle_4_in_3 | 26.42 | 26.42 | ||
| mux_fle_4_in_4 | 33.02 | 33.02 | ||
| mux_fle_4_in_5 | 31.13 | 31.13 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 45.21 | 45.21 | ||
| mux_fle_5_in_1 | 50.00 | 50.00 | ||
| mux_fle_5_in_2 | 52.74 | 52.74 | ||
| mux_fle_5_in_3 | 19.81 | 19.81 | ||
| mux_fle_5_in_4 | 19.81 | 19.81 | ||
| mux_fle_5_in_5 | 29.25 | 29.25 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 39.04 | 39.04 | ||
| mux_fle_6_in_1 | 47.95 | 47.95 | ||
| mux_fle_6_in_2 | 51.37 | 51.37 | ||
| mux_fle_6_in_3 | 17.92 | 17.92 | ||
| mux_fle_6_in_4 | 18.87 | 18.87 | ||
| mux_fle_6_in_5 | 31.13 | 31.13 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 41.78 | 41.78 | ||
| mux_fle_7_in_1 | 52.05 | 52.05 | ||
| mux_fle_7_in_2 | 51.37 | 51.37 | ||
| mux_fle_7_in_3 | 20.75 | 20.75 | ||
| mux_fle_7_in_4 | 18.87 | 18.87 | ||
| mux_fle_7_in_5 | 31.13 | 31.13 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 40.41 | 40.41 | ||
| mux_fle_8_in_1 | 48.63 | 48.63 | ||
| mux_fle_8_in_2 | 51.37 | 51.37 | ||
| mux_fle_8_in_3 | 23.58 | 23.58 | ||
| mux_fle_8_in_4 | 24.53 | 24.53 | ||
| mux_fle_8_in_5 | 30.19 | 30.19 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 47.26 | 47.26 | ||
| mux_fle_9_in_1 | 53.42 | 53.42 | ||
| mux_fle_9_in_2 | 52.05 | 52.05 | ||
| mux_fle_9_in_3 | 22.64 | 22.64 | ||
| mux_fle_9_in_4 | 33.02 | 33.02 | ||
| mux_fle_9_in_5 | 31.13 | 31.13 |
| SCORE | LINE | TOGGLE | BRANCH |
| 61.05 | 61.05 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.81 | 100.00 | 62.44 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 73.28 | 73.28 | grid_clb_5__8_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.41 | 100.00 | 61.23 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.71 | 100.00 | 62.12 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.78 | 100.00 | 62.34 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.21 | 100.00 | 63.62 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 81.01 | 100.00 | 63.02 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.91 | 100.00 | 62.74 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.92 | 100.00 | 62.75 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.87 | 100.00 | 62.61 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.76 | 100.00 | 62.28 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.66 | 100.00 | 61.98 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_1_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_5_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_8_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_9_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 73.97 | 73.97 | ||
| mux_fle_0_in_1 | 72.60 | 72.60 | ||
| mux_fle_0_in_2 | 62.33 | 62.33 | ||
| mux_fle_0_in_3 | 63.21 | 63.21 | ||
| mux_fle_0_in_4 | 52.83 | 52.83 | ||
| mux_fle_0_in_5 | 50.00 | 50.00 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 73.29 | 73.29 | ||
| mux_fle_1_in_1 | 73.29 | 73.29 | ||
| mux_fle_1_in_2 | 71.92 | 71.92 | ||
| mux_fle_1_in_3 | 67.92 | 67.92 | ||
| mux_fle_1_in_4 | 51.89 | 51.89 | ||
| mux_fle_1_in_5 | 50.00 | 50.00 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 73.97 | 73.97 | ||
| mux_fle_2_in_1 | 69.18 | 69.18 | ||
| mux_fle_2_in_2 | 76.03 | 76.03 | ||
| mux_fle_2_in_3 | 67.92 | 67.92 | ||
| mux_fle_2_in_4 | 52.83 | 52.83 | ||
| mux_fle_2_in_5 | 49.06 | 49.06 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 73.97 | 73.97 | ||
| mux_fle_3_in_1 | 76.03 | 76.03 | ||
| mux_fle_3_in_2 | 71.92 | 71.92 | ||
| mux_fle_3_in_3 | 60.38 | 60.38 | ||
| mux_fle_3_in_4 | 52.83 | 52.83 | ||
| mux_fle_3_in_5 | 49.06 | 49.06 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 75.34 | 75.34 | ||
| mux_fle_4_in_1 | 71.23 | 71.23 | ||
| mux_fle_4_in_2 | 72.60 | 72.60 | ||
| mux_fle_4_in_3 | 60.38 | 60.38 | ||
| mux_fle_4_in_4 | 52.83 | 52.83 | ||
| mux_fle_4_in_5 | 50.00 | 50.00 | ||
| mux_fle_5_clk_0 | 64.71 | 64.71 | ||
| mux_fle_5_in_0 | 76.71 | 76.71 | ||
| mux_fle_5_in_1 | 72.60 | 72.60 | ||
| mux_fle_5_in_2 | 67.81 | 67.81 | ||
| mux_fle_5_in_3 | 57.55 | 57.55 | ||
| mux_fle_5_in_4 | 50.94 | 50.94 | ||
| mux_fle_5_in_5 | 48.11 | 48.11 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 71.92 | 71.92 | ||
| mux_fle_6_in_1 | 68.49 | 68.49 | ||
| mux_fle_6_in_2 | 69.86 | 69.86 | ||
| mux_fle_6_in_3 | 66.98 | 66.98 | ||
| mux_fle_6_in_4 | 50.94 | 50.94 | ||
| mux_fle_6_in_5 | 48.11 | 48.11 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 71.23 | 71.23 | ||
| mux_fle_7_in_1 | 73.97 | 73.97 | ||
| mux_fle_7_in_2 | 70.55 | 70.55 | ||
| mux_fle_7_in_3 | 68.87 | 68.87 | ||
| mux_fle_7_in_4 | 52.83 | 52.83 | ||
| mux_fle_7_in_5 | 50.00 | 50.00 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 71.92 | 71.92 | ||
| mux_fle_8_in_1 | 67.12 | 67.12 | ||
| mux_fle_8_in_2 | 67.12 | 67.12 | ||
| mux_fle_8_in_3 | 65.09 | 65.09 | ||
| mux_fle_8_in_4 | 50.00 | 50.00 | ||
| mux_fle_8_in_5 | 49.06 | 49.06 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 73.29 | 73.29 | ||
| mux_fle_9_in_1 | 69.86 | 69.86 | ||
| mux_fle_9_in_2 | 67.81 | 67.81 | ||
| mux_fle_9_in_3 | 59.43 | 59.43 | ||
| mux_fle_9_in_4 | 51.89 | 51.89 | ||
| mux_fle_9_in_5 | 49.06 | 49.06 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.91 | 57.91 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.95 | 100.00 | 50.85 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 59.07 | 59.07 | grid_clb_5__9_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.62 | 100.00 | 52.87 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.49 | 100.00 | 52.47 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.50 | 100.00 | 52.49 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.50 | 100.00 | 52.50 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.34 | 100.00 | 52.03 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.43 | 100.00 | 52.28 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.44 | 100.00 | 52.31 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.68 | 100.00 | 53.03 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_5_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_1 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mux_fle_0_cin_0 | 18.18 | 18.18 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 26.71 | 26.71 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 27.40 | 27.40 | ||
| mux_fle_1_in_1 | 28.08 | 28.08 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 4.72 | 4.72 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 28.08 | 28.08 | ||
| mux_fle_2_in_1 | 27.40 | 27.40 | ||
| mux_fle_2_in_2 | 27.40 | 27.40 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 4.72 | 4.72 | ||
| mux_fle_2_in_5 | 4.72 | 4.72 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 27.40 | 27.40 | ||
| mux_fle_3_in_1 | 26.71 | 26.71 | ||
| mux_fle_3_in_2 | 28.08 | 28.08 | ||
| mux_fle_3_in_3 | 4.72 | 4.72 | ||
| mux_fle_3_in_4 | 4.72 | 4.72 | ||
| mux_fle_3_in_5 | 2.83 | 2.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 27.40 | 27.40 | ||
| mux_fle_4_in_1 | 27.40 | 27.40 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 26.03 | 26.03 | ||
| mux_fle_5_in_3 | 2.83 | 2.83 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 1.89 | 1.89 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 26.71 | 26.71 | ||
| mux_fle_6_in_1 | 26.71 | 26.71 | ||
| mux_fle_6_in_2 | 26.71 | 26.71 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 1.89 | 1.89 | ||
| mux_fle_6_in_5 | 3.77 | 3.77 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 28.08 | 28.08 | ||
| mux_fle_7_in_1 | 26.03 | 26.03 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 4.72 | 4.72 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 27.40 | 27.40 | ||
| mux_fle_8_in_1 | 28.08 | 28.08 | ||
| mux_fle_8_in_2 | 28.08 | 28.08 | ||
| mux_fle_8_in_3 | 4.72 | 4.72 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 1.89 | 1.89 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 27.40 | 27.40 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 27.40 | 27.40 | ||
| mux_fle_9_in_3 | 2.83 | 2.83 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 3.77 | 3.77 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.65 | 59.65 |
| SCORE | LINE | TOGGLE | BRANCH |
| 80.01 | 100.00 | 60.02 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 67.65 | 67.65 | grid_clb_5__10_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 80.44 | 100.00 | 61.33 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 80.49 | 100.00 | 61.46 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 80.56 | 100.00 | 61.69 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 80.57 | 100.00 | 61.72 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 80.27 | 100.00 | 60.82 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 80.42 | 100.00 | 61.26 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 80.62 | 100.00 | 61.87 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 80.93 | 100.00 | 62.79 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 80.28 | 100.00 | 60.84 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 80.65 | 100.00 | 61.94 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_3 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_1_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_3_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_4_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_5_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_5_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_8_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 43.15 | 43.15 | ||
| mux_fle_0_in_1 | 61.64 | 61.64 | ||
| mux_fle_0_in_2 | 67.81 | 67.81 | ||
| mux_fle_0_in_3 | 26.42 | 26.42 | ||
| mux_fle_0_in_4 | 21.70 | 21.70 | ||
| mux_fle_0_in_5 | 51.89 | 51.89 | ||
| mux_fle_1_clk_0 | 67.65 | 67.65 | ||
| mux_fle_1_in_0 | 43.84 | 43.84 | ||
| mux_fle_1_in_1 | 64.38 | 64.38 | ||
| mux_fle_1_in_2 | 57.53 | 57.53 | ||
| mux_fle_1_in_3 | 27.36 | 27.36 | ||
| mux_fle_1_in_4 | 36.79 | 36.79 | ||
| mux_fle_1_in_5 | 50.00 | 50.00 | ||
| mux_fle_2_clk_0 | 64.71 | 64.71 | ||
| mux_fle_2_in_0 | 43.84 | 43.84 | ||
| mux_fle_2_in_1 | 60.27 | 60.27 | ||
| mux_fle_2_in_2 | 60.27 | 60.27 | ||
| mux_fle_2_in_3 | 34.91 | 34.91 | ||
| mux_fle_2_in_4 | 22.64 | 22.64 | ||
| mux_fle_2_in_5 | 50.94 | 50.94 | ||
| mux_fle_3_clk_0 | 67.65 | 67.65 | ||
| mux_fle_3_in_0 | 49.32 | 49.32 | ||
| mux_fle_3_in_1 | 64.38 | 64.38 | ||
| mux_fle_3_in_2 | 56.85 | 56.85 | ||
| mux_fle_3_in_3 | 28.30 | 28.30 | ||
| mux_fle_3_in_4 | 23.58 | 23.58 | ||
| mux_fle_3_in_5 | 51.89 | 51.89 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 43.84 | 43.84 | ||
| mux_fle_4_in_1 | 60.27 | 60.27 | ||
| mux_fle_4_in_2 | 65.07 | 65.07 | ||
| mux_fle_4_in_3 | 44.34 | 44.34 | ||
| mux_fle_4_in_4 | 24.53 | 24.53 | ||
| mux_fle_4_in_5 | 51.89 | 51.89 | ||
| mux_fle_5_clk_0 | 67.65 | 67.65 | ||
| mux_fle_5_in_0 | 47.95 | 47.95 | ||
| mux_fle_5_in_1 | 60.27 | 60.27 | ||
| mux_fle_5_in_2 | 57.53 | 57.53 | ||
| mux_fle_5_in_3 | 36.79 | 36.79 | ||
| mux_fle_5_in_4 | 23.58 | 23.58 | ||
| mux_fle_5_in_5 | 50.00 | 50.00 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 56.16 | 56.16 | ||
| mux_fle_6_in_1 | 60.96 | 60.96 | ||
| mux_fle_6_in_2 | 56.16 | 56.16 | ||
| mux_fle_6_in_3 | 27.36 | 27.36 | ||
| mux_fle_6_in_4 | 24.53 | 24.53 | ||
| mux_fle_6_in_5 | 51.89 | 51.89 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 54.79 | 54.79 | ||
| mux_fle_7_in_1 | 63.70 | 63.70 | ||
| mux_fle_7_in_2 | 57.53 | 57.53 | ||
| mux_fle_7_in_3 | 28.30 | 28.30 | ||
| mux_fle_7_in_4 | 23.58 | 23.58 | ||
| mux_fle_7_in_5 | 50.94 | 50.94 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 47.95 | 47.95 | ||
| mux_fle_8_in_1 | 59.59 | 59.59 | ||
| mux_fle_8_in_2 | 65.07 | 65.07 | ||
| mux_fle_8_in_3 | 27.36 | 27.36 | ||
| mux_fle_8_in_4 | 23.58 | 23.58 | ||
| mux_fle_8_in_5 | 51.89 | 51.89 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 51.37 | 51.37 | ||
| mux_fle_9_in_1 | 60.27 | 60.27 | ||
| mux_fle_9_in_2 | 56.16 | 56.16 | ||
| mux_fle_9_in_3 | 39.62 | 39.62 | ||
| mux_fle_9_in_4 | 22.64 | 22.64 | ||
| mux_fle_9_in_5 | 51.89 | 51.89 |
| SCORE | LINE | TOGGLE | BRANCH |
| 57.94 | 57.94 |
| SCORE | LINE | TOGGLE | BRANCH |
| 76.97 | 100.00 | 50.90 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 58.58 | 58.58 | grid_clb_5__11_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.39 | 100.00 | 52.16 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.50 | 100.00 | 52.49 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.64 | 100.00 | 52.91 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.70 | 100.00 | 53.09 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.47 | 100.00 | 52.42 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.67 | 100.00 | 53.01 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 77.21 | 100.00 | 51.62 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 77.44 | 100.00 | 52.31 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 77.62 | 100.00 | 52.87 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 77.51 | 100.00 | 52.52 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 80.07 | 100.00 | 60.20 | 80.00 |
| mem_fle_7_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_7_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_8_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_8_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_1 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 67.65 | 67.65 | ||
| mux_fle_0_in_0 | 28.08 | 28.08 | ||
| mux_fle_0_in_1 | 28.08 | 28.08 | ||
| mux_fle_0_in_2 | 27.40 | 27.40 | ||
| mux_fle_0_in_3 | 4.72 | 4.72 | ||
| mux_fle_0_in_4 | 4.72 | 4.72 | ||
| mux_fle_0_in_5 | 4.72 | 4.72 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 28.08 | 28.08 | ||
| mux_fle_1_in_1 | 27.40 | 27.40 | ||
| mux_fle_1_in_2 | 28.08 | 28.08 | ||
| mux_fle_1_in_3 | 4.72 | 4.72 | ||
| mux_fle_1_in_4 | 2.83 | 2.83 | ||
| mux_fle_1_in_5 | 4.72 | 4.72 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 26.71 | 26.71 | ||
| mux_fle_2_in_1 | 28.08 | 28.08 | ||
| mux_fle_2_in_2 | 28.08 | 28.08 | ||
| mux_fle_2_in_3 | 4.72 | 4.72 | ||
| mux_fle_2_in_4 | 3.77 | 3.77 | ||
| mux_fle_2_in_5 | 2.83 | 2.83 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 28.08 | 28.08 | ||
| mux_fle_3_in_1 | 27.40 | 27.40 | ||
| mux_fle_3_in_2 | 27.40 | 27.40 | ||
| mux_fle_3_in_3 | 3.77 | 3.77 | ||
| mux_fle_3_in_4 | 3.77 | 3.77 | ||
| mux_fle_3_in_5 | 2.83 | 2.83 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 26.71 | 26.71 | ||
| mux_fle_4_in_1 | 28.08 | 28.08 | ||
| mux_fle_4_in_2 | 28.08 | 28.08 | ||
| mux_fle_4_in_3 | 4.72 | 4.72 | ||
| mux_fle_4_in_4 | 4.72 | 4.72 | ||
| mux_fle_4_in_5 | 4.72 | 4.72 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 27.40 | 27.40 | ||
| mux_fle_5_in_1 | 28.08 | 28.08 | ||
| mux_fle_5_in_2 | 27.40 | 27.40 | ||
| mux_fle_5_in_3 | 4.72 | 4.72 | ||
| mux_fle_5_in_4 | 4.72 | 4.72 | ||
| mux_fle_5_in_5 | 2.83 | 2.83 | ||
| mux_fle_6_clk_0 | 70.59 | 70.59 | ||
| mux_fle_6_in_0 | 28.08 | 28.08 | ||
| mux_fle_6_in_1 | 27.40 | 27.40 | ||
| mux_fle_6_in_2 | 27.40 | 27.40 | ||
| mux_fle_6_in_3 | 3.77 | 3.77 | ||
| mux_fle_6_in_4 | 3.77 | 3.77 | ||
| mux_fle_6_in_5 | 4.72 | 4.72 | ||
| mux_fle_7_clk_0 | 64.71 | 64.71 | ||
| mux_fle_7_in_0 | 26.71 | 26.71 | ||
| mux_fle_7_in_1 | 27.40 | 27.40 | ||
| mux_fle_7_in_2 | 28.08 | 28.08 | ||
| mux_fle_7_in_3 | 4.72 | 4.72 | ||
| mux_fle_7_in_4 | 4.72 | 4.72 | ||
| mux_fle_7_in_5 | 3.77 | 3.77 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 26.71 | 26.71 | ||
| mux_fle_8_in_1 | 27.40 | 27.40 | ||
| mux_fle_8_in_2 | 26.71 | 26.71 | ||
| mux_fle_8_in_3 | 3.77 | 3.77 | ||
| mux_fle_8_in_4 | 4.72 | 4.72 | ||
| mux_fle_8_in_5 | 2.83 | 2.83 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 28.08 | 28.08 | ||
| mux_fle_9_in_1 | 27.40 | 27.40 | ||
| mux_fle_9_in_2 | 28.08 | 28.08 | ||
| mux_fle_9_in_3 | 3.77 | 3.77 | ||
| mux_fle_9_in_4 | 3.77 | 3.77 | ||
| mux_fle_9_in_5 | 4.72 | 4.72 |
| SCORE | LINE | TOGGLE | BRANCH |
| 59.32 | 59.32 |
| SCORE | LINE | TOGGLE | BRANCH |
| 78.20 | 100.00 | 54.60 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 64.22 | 64.22 | grid_clb_5__12_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 0.00 | 0.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 0.00 | 0.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 0.00 | 0.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 0.00 | 0.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 0.00 | 0.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 0.00 | 0.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 0.00 | 0.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 0.00 | 0.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 0.00 | 0.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 0.00 | 0.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 77.38 | 100.00 | 52.13 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 77.55 | 100.00 | 52.65 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 77.48 | 100.00 | 52.44 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 77.43 | 100.00 | 52.28 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 77.37 | 100.00 | 52.10 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 77.46 | 100.00 | 52.39 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 79.61 | 100.00 | 58.82 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 79.31 | 100.00 | 57.92 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.20 | 100.00 | 63.61 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 79.08 | 100.00 | 57.25 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_3 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_1_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_2 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_1_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_in_4 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_1_in_5 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_2_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_2_in_0 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_1 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_2_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_in_4 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_3_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_3_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_3 | 76.87 | 100.00 | 50.62 | 80.00 |
| mem_fle_3_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_4_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_4_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_5_in_0 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_1 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_2 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_5_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_6_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_6_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_7_in_3 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_7_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_1 | 78.11 | 100.00 | 54.32 | 80.00 |
| mem_fle_9_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 38.36 | 38.36 | ||
| mux_fle_0_in_1 | 41.78 | 41.78 | ||
| mux_fle_0_in_2 | 39.73 | 39.73 | ||
| mux_fle_0_in_3 | 18.87 | 18.87 | ||
| mux_fle_0_in_4 | 16.98 | 16.98 | ||
| mux_fle_0_in_5 | 24.53 | 24.53 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 37.67 | 37.67 | ||
| mux_fle_1_in_1 | 41.78 | 41.78 | ||
| mux_fle_1_in_2 | 38.36 | 38.36 | ||
| mux_fle_1_in_3 | 19.81 | 19.81 | ||
| mux_fle_1_in_4 | 15.09 | 15.09 | ||
| mux_fle_1_in_5 | 22.64 | 22.64 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 38.36 | 38.36 | ||
| mux_fle_2_in_1 | 40.41 | 40.41 | ||
| mux_fle_2_in_2 | 39.04 | 39.04 | ||
| mux_fle_2_in_3 | 20.75 | 20.75 | ||
| mux_fle_2_in_4 | 16.98 | 16.98 | ||
| mux_fle_2_in_5 | 25.47 | 25.47 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 37.67 | 37.67 | ||
| mux_fle_3_in_1 | 41.78 | 41.78 | ||
| mux_fle_3_in_2 | 39.73 | 39.73 | ||
| mux_fle_3_in_3 | 16.04 | 16.04 | ||
| mux_fle_3_in_4 | 17.92 | 17.92 | ||
| mux_fle_3_in_5 | 25.47 | 25.47 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 36.99 | 36.99 | ||
| mux_fle_4_in_1 | 41.78 | 41.78 | ||
| mux_fle_4_in_2 | 39.04 | 39.04 | ||
| mux_fle_4_in_3 | 20.75 | 20.75 | ||
| mux_fle_4_in_4 | 17.92 | 17.92 | ||
| mux_fle_4_in_5 | 25.47 | 25.47 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 37.67 | 37.67 | ||
| mux_fle_5_in_1 | 41.78 | 41.78 | ||
| mux_fle_5_in_2 | 39.04 | 39.04 | ||
| mux_fle_5_in_3 | 20.75 | 20.75 | ||
| mux_fle_5_in_4 | 17.92 | 17.92 | ||
| mux_fle_5_in_5 | 24.53 | 24.53 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 49.32 | 49.32 | ||
| mux_fle_6_in_1 | 52.74 | 52.74 | ||
| mux_fle_6_in_2 | 50.68 | 50.68 | ||
| mux_fle_6_in_3 | 20.75 | 20.75 | ||
| mux_fle_6_in_4 | 40.57 | 40.57 | ||
| mux_fle_6_in_5 | 24.53 | 24.53 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 49.32 | 49.32 | ||
| mux_fle_7_in_1 | 52.74 | 52.74 | ||
| mux_fle_7_in_2 | 55.48 | 55.48 | ||
| mux_fle_7_in_3 | 19.81 | 19.81 | ||
| mux_fle_7_in_4 | 41.51 | 41.51 | ||
| mux_fle_7_in_5 | 25.47 | 25.47 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 52.05 | 52.05 | ||
| mux_fle_8_in_1 | 51.37 | 51.37 | ||
| mux_fle_8_in_2 | 58.22 | 58.22 | ||
| mux_fle_8_in_3 | 33.96 | 33.96 | ||
| mux_fle_8_in_4 | 40.57 | 40.57 | ||
| mux_fle_8_in_5 | 25.47 | 25.47 | ||
| mux_fle_9_clk_0 | 70.59 | 70.59 | ||
| mux_fle_9_in_0 | 47.26 | 47.26 | ||
| mux_fle_9_in_1 | 39.73 | 39.73 | ||
| mux_fle_9_in_2 | 58.22 | 58.22 | ||
| mux_fle_9_in_3 | 33.02 | 33.02 | ||
| mux_fle_9_in_4 | 42.45 | 42.45 | ||
| mux_fle_9_in_5 | 23.58 | 23.58 |
| SCORE | LINE | TOGGLE | BRANCH |
| 63.99 | 63.99 |
| SCORE | LINE | TOGGLE | BRANCH |
| 82.65 | 100.00 | 67.94 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 78.43 | 78.43 | grid_clb_7__1_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 100.00 | 100.00 | ||
| direct_interc_25_ | 100.00 | 100.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 0.00 | 0.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 100.00 | 100.00 | ||
| direct_interc_33_ | 100.00 | 100.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 0.00 | 0.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 100.00 | 100.00 | ||
| direct_interc_41_ | 100.00 | 100.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 0.00 | 0.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 100.00 | 100.00 | ||
| direct_interc_49_ | 100.00 | 100.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 0.00 | 0.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 100.00 | 100.00 | ||
| direct_interc_57_ | 100.00 | 100.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 0.00 | 0.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 100.00 | 100.00 | ||
| direct_interc_65_ | 100.00 | 100.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 0.00 | 0.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 100.00 | 100.00 | ||
| direct_interc_73_ | 100.00 | 100.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 0.00 | 0.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 100.00 | 100.00 | ||
| direct_interc_81_ | 100.00 | 100.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 0.00 | 0.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 100.00 | 100.00 | ||
| direct_interc_89_ | 100.00 | 100.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 0.00 | 0.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 100.00 | 100.00 | ||
| direct_interc_97_ | 100.00 | 100.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 0.00 | 0.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 83.33 | 83.33 | ||
| i_inv_x1_and_rst | 100.00 | 100.00 | ||
| i_mux2_x1_reset | 75.00 | 75.00 | ||
| i_nand2_x1_and_rst | 100.00 | 100.00 | ||
| i_or2_x1_set | 66.67 | 66.67 | ||
| logical_tile_clb_mode_default__fle_0 | 81.48 | 100.00 | 64.44 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 82.01 | 100.00 | 66.04 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 81.68 | 100.00 | 65.05 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 82.06 | 100.00 | 66.19 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 82.06 | 100.00 | 66.19 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 82.81 | 100.00 | 68.43 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 82.72 | 100.00 | 68.17 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 82.92 | 100.00 | 68.75 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 82.99 | 100.00 | 68.96 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 83.16 | 100.00 | 69.47 | 80.00 |
| mem_fle_0_cin_0 | 83.23 | 100.00 | 69.70 | 80.00 |
| mem_fle_0_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_0_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_0_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_0_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_2_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_2_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_2_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_5 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_4_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_5_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_5 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_6_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_6_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_6_in_5 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_7_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_7_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_5 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_8_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_8_in_4 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_5 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_9_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_1 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_9_in_5 | 82.43 | 100.00 | 67.28 | 80.00 |
| mux_fle_0_cin_0 | 54.55 | 54.55 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 76.71 | 76.71 | ||
| mux_fle_0_in_1 | 87.67 | 87.67 | ||
| mux_fle_0_in_2 | 89.04 | 89.04 | ||
| mux_fle_0_in_3 | 71.70 | 71.70 | ||
| mux_fle_0_in_4 | 65.09 | 65.09 | ||
| mux_fle_0_in_5 | 71.70 | 71.70 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 76.03 | 76.03 | ||
| mux_fle_1_in_1 | 90.41 | 90.41 | ||
| mux_fle_1_in_2 | 80.14 | 80.14 | ||
| mux_fle_1_in_3 | 73.58 | 73.58 | ||
| mux_fle_1_in_4 | 73.58 | 73.58 | ||
| mux_fle_1_in_5 | 72.64 | 72.64 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 79.45 | 79.45 | ||
| mux_fle_2_in_1 | 90.41 | 90.41 | ||
| mux_fle_2_in_2 | 90.41 | 90.41 | ||
| mux_fle_2_in_3 | 67.92 | 67.92 | ||
| mux_fle_2_in_4 | 71.70 | 71.70 | ||
| mux_fle_2_in_5 | 70.75 | 70.75 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 76.03 | 76.03 | ||
| mux_fle_3_in_1 | 89.04 | 89.04 | ||
| mux_fle_3_in_2 | 89.73 | 89.73 | ||
| mux_fle_3_in_3 | 70.75 | 70.75 | ||
| mux_fle_3_in_4 | 67.92 | 67.92 | ||
| mux_fle_3_in_5 | 72.64 | 72.64 | ||
| mux_fle_4_clk_0 | 70.59 | 70.59 | ||
| mux_fle_4_in_0 | 84.25 | 84.25 | ||
| mux_fle_4_in_1 | 89.73 | 89.73 | ||
| mux_fle_4_in_2 | 88.36 | 88.36 | ||
| mux_fle_4_in_3 | 73.58 | 73.58 | ||
| mux_fle_4_in_4 | 68.87 | 68.87 | ||
| mux_fle_4_in_5 | 72.64 | 72.64 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 78.08 | 78.08 | ||
| mux_fle_5_in_1 | 89.73 | 89.73 | ||
| mux_fle_5_in_2 | 90.41 | 90.41 | ||
| mux_fle_5_in_3 | 73.58 | 73.58 | ||
| mux_fle_5_in_4 | 72.64 | 72.64 | ||
| mux_fle_5_in_5 | 78.30 | 78.30 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 78.08 | 78.08 | ||
| mux_fle_6_in_1 | 90.41 | 90.41 | ||
| mux_fle_6_in_2 | 90.41 | 90.41 | ||
| mux_fle_6_in_3 | 72.64 | 72.64 | ||
| mux_fle_6_in_4 | 74.53 | 74.53 | ||
| mux_fle_6_in_5 | 78.30 | 78.30 | ||
| mux_fle_7_clk_0 | 70.59 | 70.59 | ||
| mux_fle_7_in_0 | 81.51 | 81.51 | ||
| mux_fle_7_in_1 | 90.41 | 90.41 | ||
| mux_fle_7_in_2 | 89.73 | 89.73 | ||
| mux_fle_7_in_3 | 74.53 | 74.53 | ||
| mux_fle_7_in_4 | 70.75 | 70.75 | ||
| mux_fle_7_in_5 | 78.30 | 78.30 | ||
| mux_fle_8_clk_0 | 70.59 | 70.59 | ||
| mux_fle_8_in_0 | 80.82 | 80.82 | ||
| mux_fle_8_in_1 | 89.73 | 89.73 | ||
| mux_fle_8_in_2 | 89.73 | 89.73 | ||
| mux_fle_8_in_3 | 73.58 | 73.58 | ||
| mux_fle_8_in_4 | 70.75 | 70.75 | ||
| mux_fle_8_in_5 | 79.25 | 79.25 | ||
| mux_fle_9_clk_0 | 67.65 | 67.65 | ||
| mux_fle_9_in_0 | 84.25 | 84.25 | ||
| mux_fle_9_in_1 | 90.41 | 90.41 | ||
| mux_fle_9_in_2 | 90.41 | 90.41 | ||
| mux_fle_9_in_3 | 73.58 | 73.58 | ||
| mux_fle_9_in_4 | 74.53 | 74.53 | ||
| mux_fle_9_in_5 | 85.85 | 85.85 |
| SCORE | LINE | TOGGLE | BRANCH |
| 62.31 | 62.31 |
| SCORE | LINE | TOGGLE | BRANCH |
| 82.07 | 100.00 | 66.20 | 80.00 |
| SCORE | LINE | TOGGLE | BRANCH | NAME |
| 78.19 | 78.19 | grid_clb_7__2_ |
| NAME | SCORE | LINE | TOGGLE | BRANCH |
| direct_interc_0_ | 100.00 | 100.00 | ||
| direct_interc_100_ | 0.00 | 0.00 | ||
| direct_interc_101_ | 100.00 | 100.00 | ||
| direct_interc_10_ | 100.00 | 100.00 | ||
| direct_interc_11_ | 100.00 | 100.00 | ||
| direct_interc_12_ | 100.00 | 100.00 | ||
| direct_interc_13_ | 100.00 | 100.00 | ||
| direct_interc_14_ | 100.00 | 100.00 | ||
| direct_interc_15_ | 100.00 | 100.00 | ||
| direct_interc_16_ | 100.00 | 100.00 | ||
| direct_interc_17_ | 100.00 | 100.00 | ||
| direct_interc_18_ | 100.00 | 100.00 | ||
| direct_interc_19_ | 100.00 | 100.00 | ||
| direct_interc_1_ | 100.00 | 100.00 | ||
| direct_interc_20_ | 100.00 | 100.00 | ||
| direct_interc_21_ | 100.00 | 100.00 | ||
| direct_interc_22_ | 100.00 | 100.00 | ||
| direct_interc_23_ | 0.00 | 0.00 | ||
| direct_interc_24_ | 0.00 | 0.00 | ||
| direct_interc_25_ | 0.00 | 0.00 | ||
| direct_interc_26_ | 0.00 | 0.00 | ||
| direct_interc_27_ | 100.00 | 100.00 | ||
| direct_interc_28_ | 0.00 | 0.00 | ||
| direct_interc_29_ | 100.00 | 100.00 | ||
| direct_interc_2_ | 100.00 | 100.00 | ||
| direct_interc_30_ | 100.00 | 100.00 | ||
| direct_interc_31_ | 100.00 | 100.00 | ||
| direct_interc_32_ | 0.00 | 0.00 | ||
| direct_interc_33_ | 0.00 | 0.00 | ||
| direct_interc_34_ | 0.00 | 0.00 | ||
| direct_interc_35_ | 100.00 | 100.00 | ||
| direct_interc_36_ | 0.00 | 0.00 | ||
| direct_interc_37_ | 100.00 | 100.00 | ||
| direct_interc_38_ | 100.00 | 100.00 | ||
| direct_interc_39_ | 100.00 | 100.00 | ||
| direct_interc_3_ | 100.00 | 100.00 | ||
| direct_interc_40_ | 0.00 | 0.00 | ||
| direct_interc_41_ | 0.00 | 0.00 | ||
| direct_interc_42_ | 0.00 | 0.00 | ||
| direct_interc_43_ | 100.00 | 100.00 | ||
| direct_interc_44_ | 0.00 | 0.00 | ||
| direct_interc_45_ | 100.00 | 100.00 | ||
| direct_interc_46_ | 100.00 | 100.00 | ||
| direct_interc_47_ | 100.00 | 100.00 | ||
| direct_interc_48_ | 0.00 | 0.00 | ||
| direct_interc_49_ | 0.00 | 0.00 | ||
| direct_interc_4_ | 100.00 | 100.00 | ||
| direct_interc_50_ | 0.00 | 0.00 | ||
| direct_interc_51_ | 100.00 | 100.00 | ||
| direct_interc_52_ | 0.00 | 0.00 | ||
| direct_interc_53_ | 100.00 | 100.00 | ||
| direct_interc_54_ | 100.00 | 100.00 | ||
| direct_interc_55_ | 100.00 | 100.00 | ||
| direct_interc_56_ | 0.00 | 0.00 | ||
| direct_interc_57_ | 0.00 | 0.00 | ||
| direct_interc_58_ | 0.00 | 0.00 | ||
| direct_interc_59_ | 100.00 | 100.00 | ||
| direct_interc_5_ | 100.00 | 100.00 | ||
| direct_interc_60_ | 0.00 | 0.00 | ||
| direct_interc_61_ | 100.00 | 100.00 | ||
| direct_interc_62_ | 100.00 | 100.00 | ||
| direct_interc_63_ | 100.00 | 100.00 | ||
| direct_interc_64_ | 0.00 | 0.00 | ||
| direct_interc_65_ | 0.00 | 0.00 | ||
| direct_interc_66_ | 0.00 | 0.00 | ||
| direct_interc_67_ | 100.00 | 100.00 | ||
| direct_interc_68_ | 0.00 | 0.00 | ||
| direct_interc_69_ | 100.00 | 100.00 | ||
| direct_interc_6_ | 100.00 | 100.00 | ||
| direct_interc_70_ | 100.00 | 100.00 | ||
| direct_interc_71_ | 100.00 | 100.00 | ||
| direct_interc_72_ | 0.00 | 0.00 | ||
| direct_interc_73_ | 0.00 | 0.00 | ||
| direct_interc_74_ | 0.00 | 0.00 | ||
| direct_interc_75_ | 100.00 | 100.00 | ||
| direct_interc_76_ | 0.00 | 0.00 | ||
| direct_interc_77_ | 100.00 | 100.00 | ||
| direct_interc_78_ | 100.00 | 100.00 | ||
| direct_interc_79_ | 100.00 | 100.00 | ||
| direct_interc_7_ | 100.00 | 100.00 | ||
| direct_interc_80_ | 0.00 | 0.00 | ||
| direct_interc_81_ | 0.00 | 0.00 | ||
| direct_interc_82_ | 0.00 | 0.00 | ||
| direct_interc_83_ | 100.00 | 100.00 | ||
| direct_interc_84_ | 0.00 | 0.00 | ||
| direct_interc_85_ | 100.00 | 100.00 | ||
| direct_interc_86_ | 100.00 | 100.00 | ||
| direct_interc_87_ | 100.00 | 100.00 | ||
| direct_interc_88_ | 0.00 | 0.00 | ||
| direct_interc_89_ | 0.00 | 0.00 | ||
| direct_interc_8_ | 100.00 | 100.00 | ||
| direct_interc_90_ | 0.00 | 0.00 | ||
| direct_interc_91_ | 100.00 | 100.00 | ||
| direct_interc_92_ | 0.00 | 0.00 | ||
| direct_interc_93_ | 100.00 | 100.00 | ||
| direct_interc_94_ | 100.00 | 100.00 | ||
| direct_interc_95_ | 100.00 | 100.00 | ||
| direct_interc_96_ | 0.00 | 0.00 | ||
| direct_interc_97_ | 0.00 | 0.00 | ||
| direct_interc_98_ | 0.00 | 0.00 | ||
| direct_interc_99_ | 100.00 | 100.00 | ||
| direct_interc_9_ | 100.00 | 100.00 | ||
| i_and2_x1_reset | 33.33 | 33.33 | ||
| i_inv_x1_and_rst | 0.00 | 0.00 | ||
| i_mux2_x1_reset | 50.00 | 50.00 | ||
| i_nand2_x1_and_rst | 33.33 | 33.33 | ||
| i_or2_x1_set | 0.00 | 0.00 | ||
| logical_tile_clb_mode_default__fle_0 | 81.28 | 100.00 | 63.83 | 80.00 |
| logical_tile_clb_mode_default__fle_1 | 81.81 | 100.00 | 65.44 | 80.00 |
| logical_tile_clb_mode_default__fle_2 | 82.01 | 100.00 | 66.03 | 80.00 |
| logical_tile_clb_mode_default__fle_3 | 81.98 | 100.00 | 65.95 | 80.00 |
| logical_tile_clb_mode_default__fle_4 | 82.00 | 100.00 | 66.01 | 80.00 |
| logical_tile_clb_mode_default__fle_5 | 81.78 | 100.00 | 65.34 | 80.00 |
| logical_tile_clb_mode_default__fle_6 | 81.52 | 100.00 | 64.57 | 80.00 |
| logical_tile_clb_mode_default__fle_7 | 81.97 | 100.00 | 65.90 | 80.00 |
| logical_tile_clb_mode_default__fle_8 | 81.89 | 100.00 | 65.67 | 80.00 |
| logical_tile_clb_mode_default__fle_9 | 82.05 | 100.00 | 66.14 | 80.00 |
| mem_fle_0_cin_0 | 80.20 | 100.00 | 60.61 | 80.00 |
| mem_fle_0_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_0_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_0_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_0_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_0_in_4 | 78.72 | 100.00 | 56.17 | 80.00 |
| mem_fle_0_in_5 | 79.34 | 100.00 | 58.02 | 80.00 |
| mem_fle_1_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_1_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_1_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_3 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_1_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_2_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_2_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_2_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_2_in_4 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_2_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_3_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_3_in_0 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_1 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_3_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_3_in_3 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_3_in_4 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_3_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_4_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_4_in_0 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_4_in_2 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_4_in_3 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_4_in_4 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_4_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_clk_0 | 83.13 | 100.00 | 69.39 | 80.00 |
| mem_fle_5_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_2 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_5_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_5_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_5_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_6_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_6_in_0 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_6_in_2 | 83.05 | 100.00 | 69.14 | 80.00 |
| mem_fle_6_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_6_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_6_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_7_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_1 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_7_in_2 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_7_in_3 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_7_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_7_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_clk_0 | 82.11 | 100.00 | 66.33 | 80.00 |
| mem_fle_8_in_0 | 81.19 | 100.00 | 63.58 | 80.00 |
| mem_fle_8_in_1 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_2 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_3 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_8_in_4 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_8_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_clk_0 | 81.09 | 100.00 | 63.27 | 80.00 |
| mem_fle_9_in_0 | 82.43 | 100.00 | 67.28 | 80.00 |
| mem_fle_9_in_1 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_2 | 79.96 | 100.00 | 59.88 | 80.00 |
| mem_fle_9_in_3 | 80.58 | 100.00 | 61.73 | 80.00 |
| mem_fle_9_in_4 | 81.81 | 100.00 | 65.43 | 80.00 |
| mem_fle_9_in_5 | 79.96 | 100.00 | 59.88 | 80.00 |
| mux_fle_0_cin_0 | 9.09 | 9.09 | ||
| mux_fle_0_clk_0 | 70.59 | 70.59 | ||
| mux_fle_0_in_0 | 78.77 | 78.77 | ||
| mux_fle_0_in_1 | 86.30 | 86.30 | ||
| mux_fle_0_in_2 | 84.93 | 84.93 | ||
| mux_fle_0_in_3 | 66.98 | 66.98 | ||
| mux_fle_0_in_4 | 61.32 | 61.32 | ||
| mux_fle_0_in_5 | 71.70 | 71.70 | ||
| mux_fle_1_clk_0 | 70.59 | 70.59 | ||
| mux_fle_1_in_0 | 83.56 | 83.56 | ||
| mux_fle_1_in_1 | 89.04 | 89.04 | ||
| mux_fle_1_in_2 | 83.56 | 83.56 | ||
| mux_fle_1_in_3 | 79.25 | 79.25 | ||
| mux_fle_1_in_4 | 70.75 | 70.75 | ||
| mux_fle_1_in_5 | 72.64 | 72.64 | ||
| mux_fle_2_clk_0 | 70.59 | 70.59 | ||
| mux_fle_2_in_0 | 82.88 | 82.88 | ||
| mux_fle_2_in_1 | 89.04 | 89.04 | ||
| mux_fle_2_in_2 | 87.67 | 87.67 | ||
| mux_fle_2_in_3 | 82.08 | 82.08 | ||
| mux_fle_2_in_4 | 66.98 | 66.98 | ||
| mux_fle_2_in_5 | 72.64 | 72.64 | ||
| mux_fle_3_clk_0 | 70.59 | 70.59 | ||
| mux_fle_3_in_0 | 85.62 | 85.62 | ||
| mux_fle_3_in_1 | 88.36 | 88.36 | ||
| mux_fle_3_in_2 | 88.36 | 88.36 | ||
| mux_fle_3_in_3 | 72.64 | 72.64 | ||
| mux_fle_3_in_4 | 73.58 | 73.58 | ||
| mux_fle_3_in_5 | 72.64 | 72.64 | ||
| mux_fle_4_clk_0 | 67.65 | 67.65 | ||
| mux_fle_4_in_0 | 86.99 | 86.99 | ||
| mux_fle_4_in_1 | 86.30 | 86.30 | ||
| mux_fle_4_in_2 | 84.93 | 84.93 | ||
| mux_fle_4_in_3 | 83.96 | 83.96 | ||
| mux_fle_4_in_4 | 77.36 | 77.36 | ||
| mux_fle_4_in_5 | 72.64 | 72.64 | ||
| mux_fle_5_clk_0 | 70.59 | 70.59 | ||
| mux_fle_5_in_0 | 84.93 | 84.93 | ||
| mux_fle_5_in_1 | 89.73 | 89.73 | ||
| mux_fle_5_in_2 | 88.36 | 88.36 | ||
| mux_fle_5_in_3 | 69.81 | 69.81 | ||
| mux_fle_5_in_4 | 63.21 | 63.21 | ||
| mux_fle_5_in_5 | 72.64 | 72.64 | ||
| mux_fle_6_clk_0 | 67.65 | 67.65 | ||
| mux_fle_6_in_0 | 84.25 | 84.25 | ||
| mux_fle_6_in_1 | 89.73 | 89.73 | ||
| mux_fle_6_in_2 | 89.73 | 89.73 | ||
| mux_fle_6_in_3 | 80.19 | 80.19 | ||
| mux_fle_6_in_4 | 68.87 | 68.87 | ||
| mux_fle_6_in_5 | 72.64 | 72.64 | ||
| mux_fle_7_clk_0 | 67.65 | 67.65 | ||
| mux_fle_7_in_0 | 84.25 | 84.25 | ||
| mux_fle_7_in_1 | 89.73 | 89.73 | ||
| mux_fle_7_in_2 | 84.25 | 84.25 | ||
| mux_fle_7_in_3 | 81.13 | 81.13 | ||
| mux_fle_7_in_4 | 63.21 | 63.21 | ||
| mux_fle_7_in_5 | 72.64 | 72.64 | ||
| mux_fle_8_clk_0 | 67.65 | 67.65 | ||
| mux_fle_8_in_0 | 82.88 | 82.88 | ||
| mux_fle_8_in_1 | 89.04 | 89.04 | ||
| mux_fle_8_in_2 | 86.99 | 86.99 | ||
| mux_fle_8_in_3 | 82.08 | 82.08 | ||
| mux_fle_8_in_4 | 63.21 | 63.21 | ||
| mux_fle_8_in_5 | 72.64 | 72.64 | ||
| mux_fle_9_clk_0 | 64.71 | 64.71 | ||
| mux_fle_9_in_0 | 78.77 | 78.77 | ||
| mux_fle_9_in_1 | 83.56 | 83.56 | ||
| mux_fle_9_in_2 | 84.93 | 84.93 | ||
| mux_fle_9_in_3 | 80.19 | 80.19 | ||
| mux_fle_9_in_4 | 76.42 | 76.42 | ||
| mux_fle_9_in_5 | 72.64 | 72.64 |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 76 | 20.82 |
| Total Bits | 8576 | 4956 | 57.79 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2599 | 60.61 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 65 | 19.29 |
| Signal Bits | 1738 | 445 | 25.60 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 344 | 39.59 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | No | No |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | No | No |
| mux_tree_size20_12_sram[0:3] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | No | No | No |
| mux_tree_size20_13_sram[0:2] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[2:4] | No | Yes | No |
| mux_tree_size20_15_sram[1] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[1:4] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | Yes | No |
| mux_tree_size20_21_sram[3] | No | No | No |
| mux_tree_size20_21_sram[0:2] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | Yes | No |
| mux_tree_size20_23_sram[3] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[2:4] | No | Yes | No |
| mux_tree_size20_27_sram[1] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | No | No |
| mux_tree_size20_28_sram[0:3] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[3] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | Yes | No |
| mux_tree_size20_9_sram[3] | No | No | No |
| mux_tree_size20_9_sram[0:2] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | No | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | No | Yes | No |
| mux_tree_size30_10_sram[0:1] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[1:3] | No | No | No |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[2:4] | No | Yes | No |
| mux_tree_size30_18_sram[0:1] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | No | Yes | No |
| mux_tree_size30_19_sram[1:2] | No | No | No |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | No | Yes | No |
| mux_tree_size30_1_sram[2] | No | No | No |
| mux_tree_size30_1_sram[0:1] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[0:3] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[3:4] | No | Yes | No |
| mux_tree_size30_21_sram[2] | No | No | No |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[1:4] | No | Yes | No |
| mux_tree_size30_22_sram[0] | No | No | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[0:2] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[2:3] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | No | Yes | No |
| mux_tree_size30_26_sram[0:2] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[3:4] | No | No | No |
| mux_tree_size30_27_sram[0:2] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | No |
| mux_tree_size30_28_sram[2:3] | No | Yes | No |
| mux_tree_size30_28_sram[1] | No | No | No |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | No | Yes | No |
| mux_tree_size30_29_sram[0:2] | No | No | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[0:3] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[2:4] | No | Yes | No |
| mux_tree_size30_5_sram[0:1] | No | No | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | No | Yes | No |
| mux_tree_size30_7_sram[1:2] | No | No | No |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | No |
| mux_tree_size30_9_sram[0:3] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[0] | No | No | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram[0] | No | No | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[1] | No | No | Yes |
| mux_tree_size4_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4968 | 57.93 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2611 | 60.89 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 457 | 26.29 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 356 | 40.97 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[0:3] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | Yes | No |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | No | No |
| mux_tree_size20_16_sram[0:3] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[1:4] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[1:4] | No | Yes | No |
| mux_tree_size20_18_sram[0] | No | No | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | Yes | No |
| mux_tree_size20_1_sram[3] | No | No | No |
| mux_tree_size20_1_sram[2] | No | Yes | No |
| mux_tree_size20_1_sram[1] | No | No | No |
| mux_tree_size20_1_sram[0] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[2:3] | No | No | No |
| mux_tree_size20_20_sram[0:1] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | No | Yes | No |
| mux_tree_size20_22_sram[2] | No | No | No |
| mux_tree_size20_22_sram[0:1] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[2:3] | No | No | No |
| mux_tree_size20_25_sram[0:1] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | Yes | No |
| mux_tree_size20_27_sram[3] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[0:2] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | No | No |
| mux_tree_size20_2_sram[0:3] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | Yes | No |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[1] | No | Yes | No |
| mux_tree_size20_3_sram[0] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | No |
| mux_tree_size20_4_sram[2:3] | No | Yes | No |
| mux_tree_size20_4_sram[0:1] | No | No | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | No | Yes | No |
| mux_tree_size20_6_sram[0:1] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | No | No |
| mux_tree_size20_7_sram[0:2] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[1] | No | Yes | No |
| mux_tree_size2_0_sram[0] | No | No | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[2:3] | No | No | No |
| mux_tree_size30_0_sram[0:1] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[2:4] | No | Yes | No |
| mux_tree_size30_11_sram[1] | No | No | No |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[1:4] | No | Yes | No |
| mux_tree_size30_17_sram[0] | No | No | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | Yes | No |
| mux_tree_size30_18_sram[3] | No | No | No |
| mux_tree_size30_18_sram[0:2] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[1:4] | No | Yes | No |
| mux_tree_size30_1_sram[0] | No | No | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[1] | No | No | No |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | No | No | Yes |
| mux_tree_size4_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 93 | 25.48 |
| Total Bits | 8576 | 5138 | 59.91 |
| Total Bits 0->1 | 4288 | 2459 | 57.35 |
| Total Bits 1->0 | 4288 | 2679 | 62.48 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4526 | 66.19 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2269 | 66.36 |
| Signals | 337 | 81 | 24.04 |
| Signal Bits | 1738 | 612 | 35.21 |
| Signal Bits 0->1 | 869 | 202 | 23.25 |
| Signal Bits 1->0 | 869 | 410 | 47.18 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[7:8] | No | Yes | No | INPUT |
| clb_I0[5:6] | No | No | No | INPUT |
| clb_I0[4] | No | Yes | No | INPUT |
| clb_I0[3] | No | No | No | INPUT |
| clb_I0[0:2] | No | Yes | No | INPUT |
| clb_I1[8:9] | No | Yes | No | INPUT |
| clb_I1[7] | No | No | No | INPUT |
| clb_I1[6] | No | Yes | No | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[2:3] | No | Yes | No | INPUT |
| clb_I1[0:1] | No | No | No | INPUT |
| clb_I2[6:9] | No | No | No | INPUT |
| clb_I2[5] | No | Yes | No | INPUT |
| clb_I2[0:4] | No | No | No | INPUT |
| clb_I3[4:9] | No | No | No | INPUT |
| clb_I3[3] | No | Yes | No | INPUT |
| clb_I3[0:2] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3] | No | Yes | No |
| mux_tree_size20_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | Yes | No |
| mux_tree_size20_12_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[1:2] | No | Yes | No |
| mux_tree_size20_15_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[0:1] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | No | Yes |
| mux_tree_size20_19_sram[3] | No | Yes | No |
| mux_tree_size20_19_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[3] | No | No | Yes |
| mux_tree_size20_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[1] | No | Yes | No |
| mux_tree_size20_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[1:4] | No | Yes | No |
| mux_tree_size20_20_sram[0] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | Yes | No |
| mux_tree_size20_21_sram[0:2] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[3] | No | No | Yes |
| mux_tree_size20_22_sram[2] | No | No | No |
| mux_tree_size20_22_sram[1] | No | No | Yes |
| mux_tree_size20_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[2] | No | No | No |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0:2] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[1:4] | No | Yes | No |
| mux_tree_size20_3_sram[0] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[3] | No | Yes | No |
| mux_tree_size20_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[1] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | Yes |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[2] | No | Yes | No |
| mux_tree_size30_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[2] | No | Yes | No |
| mux_tree_size30_10_sram[1] | No | No | No |
| mux_tree_size30_10_sram[0] | No | No | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | Yes | No |
| mux_tree_size30_11_sram[1] | No | No | Yes |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[3] | No | No | No |
| mux_tree_size30_12_sram[1:2] | No | Yes | No |
| mux_tree_size30_12_sram[0] | No | No | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[2:4] | No | Yes | No |
| mux_tree_size30_14_sram[1] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[3:4] | No | Yes | No |
| mux_tree_size30_16_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[2] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[3:4] | No | Yes | No |
| mux_tree_size30_20_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[3] | No | Yes | No |
| mux_tree_size30_23_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[2:4] | No | Yes | No |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | No | Yes | No |
| mux_tree_size30_25_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | No | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | Yes | No |
| mux_tree_size30_27_sram[3] | No | No | Yes |
| mux_tree_size30_27_sram[2] | No | Yes | No |
| mux_tree_size30_27_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[2] | No | No | Yes |
| mux_tree_size30_3_sram[1] | No | Yes | No |
| mux_tree_size30_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[2] | No | Yes | No |
| mux_tree_size30_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[3] | No | Yes | No |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[0:1] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | No | No |
| mux_tree_size30_6_sram[3] | No | Yes | No |
| mux_tree_size30_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | No | No | Yes |
| mux_tree_size30_7_sram[1:2] | No | Yes | No |
| mux_tree_size30_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | No | No | Yes |
| mux_tree_size4_1_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | No | No | Yes |
| mux_tree_size4_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | Yes | No |
| mux_tree_size20_1_out | No | Yes | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | Yes | No |
| mux_tree_size30_5_out | No | Yes | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | Yes | No |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | Yes | No |
| mux_tree_size30_11_out | No | Yes | No |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | No | Yes | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | Yes | No |
| mux_tree_size30_17_out | No | Yes | No |
| mux_tree_size20_15_out | No | Yes | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | Yes | No |
| mux_tree_size20_18_out | No | Yes | No |
| mux_tree_size20_19_out | No | Yes | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | Yes | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | Yes | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | Yes | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | Yes | No |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | Yes | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | Yes | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 114 | 31.23 |
| Total Bits | 8576 | 5155 | 60.11 |
| Total Bits 0->1 | 4288 | 2464 | 57.46 |
| Total Bits 1->0 | 4288 | 2691 | 62.76 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4525 | 66.17 |
| Port Bits 0->1 | 3419 | 2259 | 66.07 |
| Port Bits 1->0 | 3419 | 2266 | 66.28 |
| Signals | 337 | 101 | 29.97 |
| Signal Bits | 1738 | 630 | 36.25 |
| Signal Bits 0->1 | 869 | 205 | 23.59 |
| Signal Bits 1->0 | 869 | 425 | 48.91 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[5:9] | No | No | No | INPUT |
| clb_I0[4] | No | Yes | No | INPUT |
| clb_I0[2:3] | No | No | No | INPUT |
| clb_I0[1] | No | Yes | No | INPUT |
| clb_I0[0] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | No | No | No | INPUT |
| clb_I1[8] | No | Yes | No | INPUT |
| clb_I1[7] | No | No | No | INPUT |
| clb_I1[6] | No | Yes | No | INPUT |
| clb_I1[1:5] | No | No | No | INPUT |
| clb_I1[0] | No | Yes | No | INPUT |
| clb_I2[3:9] | No | No | No | INPUT |
| clb_I2[2] | No | Yes | No | INPUT |
| clb_I2[1] | No | No | No | INPUT |
| clb_I2[0] | No | Yes | No | INPUT |
| clb_I3[3:9] | No | No | No | INPUT |
| clb_I3[2] | No | Yes | No | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:3] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[0:3] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[2] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | No |
| mux_tree_size20_22_sram[1:3] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | Yes | No |
| mux_tree_size20_25_sram[1] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[2:4] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | No | No |
| mux_tree_size20_28_sram[0:3] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[3:4] | No | Yes | No |
| mux_tree_size20_29_sram[2] | No | No | No |
| mux_tree_size20_29_sram[0:1] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[2] | No | No | No |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[3] | No | Yes | No |
| mux_tree_size30_10_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | No | No |
| mux_tree_size30_11_sram[3] | No | Yes | No |
| mux_tree_size30_11_sram[2] | No | No | Yes |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[2:4] | No | Yes | No |
| mux_tree_size30_12_sram[1] | No | No | Yes |
| mux_tree_size30_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[3] | No | Yes | No |
| mux_tree_size30_13_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[1] | No | Yes | No |
| mux_tree_size30_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | Yes | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[1] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1] | No | Yes | No |
| mux_tree_size30_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | No | Yes | No |
| mux_tree_size30_18_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[1] | No | No | No |
| mux_tree_size30_18_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[2] | No | Yes | No |
| mux_tree_size30_19_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | Yes |
| mux_tree_size30_1_sram[2:3] | No | Yes | No |
| mux_tree_size30_1_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0] | No | No | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[0:3] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | Yes | No |
| mux_tree_size30_22_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0:2] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | Yes | No |
| mux_tree_size30_23_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[2] | No | Yes | No |
| mux_tree_size30_23_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[1:4] | No | Yes | No |
| mux_tree_size30_24_sram[0] | No | No | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | No | Yes | No |
| mux_tree_size30_25_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1] | No | Yes | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[2] | No | Yes | No |
| mux_tree_size30_26_sram[1] | No | No | Yes |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[1:2] | No | No | Yes |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[2] | No | Yes | No |
| mux_tree_size30_5_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[1:2] | No | Yes | No |
| mux_tree_size30_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[3] | No | No | Yes |
| mux_tree_size30_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | No | Yes | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | Yes | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | Yes | Yes | Yes |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | Yes | No |
| mux_tree_size20_3_out | No | Yes | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | Yes | No |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | No | Yes | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | Yes | No |
| mux_tree_size30_10_out | No | Yes | No |
| mux_tree_size30_11_out | No | Yes | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | Yes | No |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | No | Yes | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | Yes | No |
| mux_tree_size30_17_out | No | Yes | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | Yes | No |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | Yes | No |
| mux_tree_size30_23_out | No | Yes | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | No | Yes | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | No | Yes | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 121 | 33.15 |
| Total Bits | 8576 | 5239 | 61.09 |
| Total Bits 0->1 | 4288 | 2544 | 59.33 |
| Total Bits 1->0 | 4288 | 2695 | 62.85 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4560 | 66.69 |
| Port Bits 0->1 | 3419 | 2275 | 66.54 |
| Port Bits 1->0 | 3419 | 2285 | 66.83 |
| Signals | 337 | 108 | 32.05 |
| Signal Bits | 1738 | 679 | 39.07 |
| Signal Bits 0->1 | 869 | 269 | 30.96 |
| Signal Bits 1->0 | 869 | 410 | 47.18 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[7:9] | Yes | Yes | Yes | INPUT |
| clb_I0[6] | No | Yes | No | INPUT |
| clb_I0[4:5] | Yes | Yes | Yes | INPUT |
| clb_I0[3] | No | No | No | INPUT |
| clb_I0[2] | No | Yes | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | No | No | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[8] | No | No | No | INPUT |
| clb_I1[6:7] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | Yes | No | INPUT |
| clb_I1[3] | No | No | No | INPUT |
| clb_I1[1:2] | No | Yes | No | INPUT |
| clb_I1[0] | Yes | Yes | Yes | INPUT |
| clb_I2[7:9] | Yes | Yes | Yes | INPUT |
| clb_I2[6] | No | Yes | No | INPUT |
| clb_I2[4:5] | Yes | Yes | Yes | INPUT |
| clb_I2[3] | No | Yes | No | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[0:1] | Yes | Yes | Yes | INPUT |
| clb_I3[7:9] | No | No | No | INPUT |
| clb_I3[5:6] | No | Yes | No | INPUT |
| clb_I3[4] | No | No | No | INPUT |
| clb_I3[3] | No | Yes | No | INPUT |
| clb_I3[0:2] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3] | No | Yes | No |
| mux_tree_size20_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | Yes | No |
| mux_tree_size20_10_sram[3] | No | No | No |
| mux_tree_size20_10_sram[1:2] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[1:2] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[2] | No | No | Yes |
| mux_tree_size20_12_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[1:4] | No | Yes | No |
| mux_tree_size20_13_sram[0] | No | No | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | Yes | No |
| mux_tree_size20_14_sram[2] | No | No | No |
| mux_tree_size20_14_sram[0:1] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[1:4] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[2] | No | No | No |
| mux_tree_size20_17_sram[0:1] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[1] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[3] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[2] | No | Yes | No |
| mux_tree_size20_21_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[1:2] | No | No | No |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[1] | No | Yes | No |
| mux_tree_size20_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[4] | No | No | No |
| mux_tree_size20_26_sram[0:3] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[1:2] | No | No | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[2:4] | No | Yes | No |
| mux_tree_size20_28_sram[1] | No | No | No |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[2:3] | No | No | No |
| mux_tree_size20_29_sram[0:1] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | Yes | No |
| mux_tree_size20_2_sram[2] | No | No | No |
| mux_tree_size20_2_sram[1] | No | Yes | No |
| mux_tree_size20_2_sram[0] | No | No | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[3] | No | No | Yes |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[0] | No | No | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[2:4] | No | Yes | No |
| mux_tree_size20_8_sram[1] | No | No | No |
| mux_tree_size20_8_sram[0] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[3] | No | Yes | No |
| mux_tree_size20_9_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[1] | No | No | Yes |
| mux_tree_size20_9_sram[0] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[3] | No | Yes | No |
| mux_tree_size30_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[2:4] | No | Yes | No |
| mux_tree_size30_11_sram[1] | No | No | No |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | Yes | No |
| mux_tree_size30_12_sram[2] | No | No | No |
| mux_tree_size30_12_sram[1] | No | Yes | No |
| mux_tree_size30_12_sram[0] | No | No | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[3] | No | Yes | No |
| mux_tree_size30_13_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[1] | No | Yes | No |
| mux_tree_size30_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[3] | No | No | Yes |
| mux_tree_size30_15_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | No | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1:3] | No | Yes | No |
| mux_tree_size30_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | Yes |
| mux_tree_size30_18_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[2] | No | No | Yes |
| mux_tree_size30_19_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[3] | No | No | Yes |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0:1] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[1] | No | Yes | No |
| mux_tree_size30_20_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[3] | No | Yes | No |
| mux_tree_size30_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[0:3] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:2] | No | Yes | No |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | Yes | No |
| mux_tree_size30_28_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | Yes |
| mux_tree_size30_2_sram[3] | No | Yes | No |
| mux_tree_size30_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[3] | No | Yes | No |
| mux_tree_size30_4_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | Yes |
| mux_tree_size30_5_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[0] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[2] | No | Yes | No |
| mux_tree_size30_6_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | Yes |
| mux_tree_size30_7_sram[3] | No | Yes | No |
| mux_tree_size30_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[1] | No | No | Yes |
| mux_tree_size30_7_sram[0] | No | No | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[1] | No | Yes | No |
| mux_tree_size30_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | Yes |
| mux_tree_size30_9_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram[0] | No | No | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | Yes | Yes | Yes |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | Yes | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | Yes | Yes | Yes |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | Yes | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | Yes | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | Yes | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | Yes | No |
| mux_tree_size20_21_out | No | Yes | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | Yes | No |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | No | Yes | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | Yes | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 129 | 35.34 |
| Total Bits | 8576 | 5191 | 60.53 |
| Total Bits 0->1 | 4288 | 2501 | 58.33 |
| Total Bits 1->0 | 4288 | 2690 | 62.73 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4537 | 66.35 |
| Port Bits 0->1 | 3419 | 2267 | 66.31 |
| Port Bits 1->0 | 3419 | 2270 | 66.39 |
| Signals | 337 | 116 | 34.42 |
| Signal Bits | 1738 | 654 | 37.63 |
| Signal Bits 0->1 | 869 | 234 | 26.93 |
| Signal Bits 1->0 | 869 | 420 | 48.33 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[6:7] | No | No | No | INPUT |
| clb_I0[5] | Yes | Yes | Yes | INPUT |
| clb_I0[4] | No | Yes | No | INPUT |
| clb_I0[2:3] | Yes | Yes | Yes | INPUT |
| clb_I0[1] | No | No | No | INPUT |
| clb_I0[0] | Yes | Yes | Yes | INPUT |
| clb_I1[7:9] | No | No | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | Yes | No | INPUT |
| clb_I1[2:3] | Yes | Yes | Yes | INPUT |
| clb_I1[0:1] | No | No | No | INPUT |
| clb_I2[1:9] | No | No | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[8:9] | No | No | No | INPUT |
| clb_I3[7] | No | Yes | No | INPUT |
| clb_I3[0:6] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[2] | No | No | Yes |
| mux_tree_size20_0_sram[1] | No | No | No |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | No | Yes | No |
| mux_tree_size20_12_sram[2] | No | No | Yes |
| mux_tree_size20_12_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[2] | No | Yes | No |
| mux_tree_size20_13_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[1:4] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[1] | No | No | Yes |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | Yes | No |
| mux_tree_size20_16_sram[3] | No | No | No |
| mux_tree_size20_16_sram[0:2] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[2] | No | No | Yes |
| mux_tree_size20_18_sram[1] | No | Yes | No |
| mux_tree_size20_18_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[3] | No | Yes | No |
| mux_tree_size20_19_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[1] | No | Yes | No |
| mux_tree_size20_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | Yes |
| mux_tree_size20_22_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[0:1] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | Yes | No |
| mux_tree_size20_2_sram[3] | No | No | No |
| mux_tree_size20_2_sram[0:2] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1:2] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[2] | No | Yes | No |
| mux_tree_size20_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[2] | No | Yes | No |
| mux_tree_size30_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1:2] | No | Yes | No |
| mux_tree_size30_10_sram[0] | No | No | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | Yes | No |
| mux_tree_size30_11_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[1] | No | No | No |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | Yes | No |
| mux_tree_size30_15_sram[3] | No | No | No |
| mux_tree_size30_15_sram[0:2] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | No | No |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[3] | No | No | Yes |
| mux_tree_size30_17_sram[2] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[2:3] | No | Yes | No |
| mux_tree_size30_18_sram[0:1] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | No | No | No |
| mux_tree_size30_19_sram[0:2] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[3] | No | No | No |
| mux_tree_size30_1_sram[0:2] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[3] | No | Yes | No |
| mux_tree_size30_20_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | No | No | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[3] | No | Yes | No |
| mux_tree_size30_23_sram[2] | No | No | Yes |
| mux_tree_size30_23_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | No | No | No |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | No | Yes | No |
| mux_tree_size30_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | No | No |
| mux_tree_size30_26_sram[0:3] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | Yes | No |
| mux_tree_size30_27_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[2] | No | Yes | No |
| mux_tree_size30_27_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[1:4] | No | Yes | No |
| mux_tree_size30_29_sram[0] | No | No | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[1:3] | No | Yes | No |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[2] | No | No | Yes |
| mux_tree_size30_3_sram[1] | No | No | No |
| mux_tree_size30_3_sram[0] | No | No | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | Yes |
| mux_tree_size30_4_sram[2] | No | Yes | No |
| mux_tree_size30_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[3] | No | Yes | No |
| mux_tree_size30_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[1] | No | Yes | No |
| mux_tree_size30_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[1:2] | No | Yes | No |
| mux_tree_size30_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[1] | No | No | Yes |
| mux_tree_size4_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | Yes | Yes | Yes |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | Yes | Yes | Yes |
| mux_tree_size20_1_out | Yes | Yes | Yes |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | Yes | No |
| mux_tree_size30_11_out | No | Yes | No |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | No | Yes | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | Yes | No |
| mux_tree_size30_17_out | No | Yes | No |
| mux_tree_size20_15_out | No | Yes | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | Yes | Yes | Yes |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | Yes | Yes | Yes |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4978 | 58.05 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2621 | 61.12 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 467 | 26.87 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 366 | 42.12 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[1:4] | No | Yes | No |
| mux_tree_size20_0_sram[0] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | No | No |
| mux_tree_size20_11_sram[0:3] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[1:2] | No | No | No |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | Yes | No |
| mux_tree_size20_24_sram[2:3] | No | No | No |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | No | No |
| mux_tree_size20_28_sram[0:3] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[1:2] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[2] | No | No | No |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | No | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[3] | No | No | No |
| mux_tree_size30_13_sram[0:2] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | No |
| mux_tree_size30_14_sram[0:3] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | Yes | No |
| mux_tree_size30_15_sram[3] | No | No | No |
| mux_tree_size30_15_sram[1:2] | No | Yes | No |
| mux_tree_size30_15_sram[0] | No | No | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[1:4] | No | Yes | No |
| mux_tree_size30_17_sram[0] | No | No | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[1:4] | No | Yes | No |
| mux_tree_size30_21_sram[0] | No | No | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | No | No | No |
| mux_tree_size30_24_sram[0:2] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | No | No | No |
| mux_tree_size30_25_sram[0:2] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[0:1] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[1] | No | No | No |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | No | No | No |
| mux_tree_size30_7_sram[0:2] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | No |
| mux_tree_size30_9_sram[0:3] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | No | No | Yes |
| mux_tree_size4_0_sram[1] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[0] | No | No | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4970 | 57.95 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2613 | 60.94 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 459 | 26.41 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 358 | 41.20 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[2:4] | No | Yes | No |
| mux_tree_size20_0_sram[0:1] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[2:4] | No | Yes | No |
| mux_tree_size20_10_sram[0:1] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[3] | No | No | No |
| mux_tree_size20_11_sram[1:2] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | No | Yes | No |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | Yes | No |
| mux_tree_size20_14_sram[3] | No | No | No |
| mux_tree_size20_14_sram[0:2] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[2:4] | No | Yes | No |
| mux_tree_size20_16_sram[1] | No | No | No |
| mux_tree_size20_16_sram[0] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[1] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[1:2] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[2] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | Yes | No |
| mux_tree_size20_27_sram[3] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[2:4] | No | Yes | No |
| mux_tree_size20_3_sram[0:1] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | No | No |
| mux_tree_size20_4_sram[0:2] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[1:4] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[1:2] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | No | No |
| mux_tree_size20_8_sram[0:3] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[3:4] | No | Yes | No |
| mux_tree_size30_0_sram[1:2] | No | No | No |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[2:3] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[2:3] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | No | No | No |
| mux_tree_size30_15_sram[0:2] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | Yes | No |
| mux_tree_size30_23_sram[3] | No | No | No |
| mux_tree_size30_23_sram[0:2] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | No | No |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[2] | No | No | No |
| mux_tree_size30_25_sram[0:1] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | Yes | No |
| mux_tree_size30_27_sram[3] | No | No | No |
| mux_tree_size30_27_sram[0:2] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | No |
| mux_tree_size30_28_sram[0:3] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[1:2] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[0] | No | No | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 79 | 21.64 |
| Total Bits | 8576 | 4984 | 58.12 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2627 | 61.26 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 68 | 20.18 |
| Signal Bits | 1738 | 473 | 27.22 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 372 | 42.81 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[0:3] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | Yes | No |
| mux_tree_size20_22_sram[3] | No | No | No |
| mux_tree_size20_22_sram[0:2] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | Yes | No |
| mux_tree_size20_25_sram[1] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | Yes | No |
| mux_tree_size20_2_sram[2] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[2:4] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | Yes | No |
| mux_tree_size20_6_sram[2:3] | No | No | No |
| mux_tree_size20_6_sram[0:1] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[0:3] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | No | No |
| mux_tree_size30_0_sram[0:3] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[3:4] | No | Yes | No |
| mux_tree_size30_17_sram[2] | No | No | No |
| mux_tree_size30_17_sram[0:1] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[1:2] | No | Yes | No |
| mux_tree_size30_19_sram[0] | No | No | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[2:4] | No | Yes | No |
| mux_tree_size30_20_sram[0:1] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[3] | No | No | No |
| mux_tree_size30_21_sram[0:2] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[3:4] | No | Yes | No |
| mux_tree_size30_27_sram[2] | No | No | No |
| mux_tree_size30_27_sram[0:1] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | No |
| mux_tree_size30_28_sram[0:3] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[2:4] | No | Yes | No |
| mux_tree_size30_2_sram[1] | No | No | No |
| mux_tree_size30_2_sram[0] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[2:4] | No | Yes | No |
| mux_tree_size30_4_sram[0:1] | No | No | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | Yes | No |
| mux_tree_size30_6_sram[3] | No | No | No |
| mux_tree_size30_6_sram[0:2] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | Yes | No |
| mux_tree_size30_9_sram[3] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4964 | 57.88 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2607 | 60.80 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 453 | 26.06 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 352 | 40.51 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[2:4] | No | Yes | No |
| mux_tree_size20_11_sram[1] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | No | Yes | No |
| mux_tree_size20_12_sram[2] | No | No | No |
| mux_tree_size20_12_sram[0:1] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[1:3] | No | Yes | No |
| mux_tree_size20_13_sram[0] | No | No | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[2] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | Yes | No |
| mux_tree_size20_21_sram[2] | No | No | No |
| mux_tree_size20_21_sram[1] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[3] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[2] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | No | No |
| mux_tree_size20_2_sram[0:3] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | Yes | No |
| mux_tree_size20_6_sram[2:3] | No | No | No |
| mux_tree_size20_6_sram[0:1] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[3] | No | No | No |
| mux_tree_size20_8_sram[1:2] | No | Yes | No |
| mux_tree_size20_8_sram[0] | No | No | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[3] | No | No | No |
| mux_tree_size30_0_sram[0:2] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | No | No |
| mux_tree_size30_10_sram[1:3] | No | Yes | No |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | No |
| mux_tree_size30_14_sram[2:3] | No | Yes | No |
| mux_tree_size30_14_sram[1] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | Yes | No |
| mux_tree_size30_16_sram[3] | No | No | No |
| mux_tree_size30_16_sram[1:2] | No | Yes | No |
| mux_tree_size30_16_sram[0] | No | No | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | No |
| mux_tree_size30_1_sram[0:3] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[2:4] | No | Yes | No |
| mux_tree_size30_20_sram[0:1] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[1:4] | No | Yes | No |
| mux_tree_size30_25_sram[0] | No | No | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[3] | No | No | No |
| mux_tree_size30_26_sram[0:2] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | No | No |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[1:2] | No | No | No |
| mux_tree_size30_27_sram[0] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[1:4] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | No |
| mux_tree_size30_29_sram[0:3] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | Yes | No |
| mux_tree_size30_2_sram[2:3] | No | No | No |
| mux_tree_size30_2_sram[0:1] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[3] | No | No | No |
| mux_tree_size30_3_sram[2] | No | Yes | No |
| mux_tree_size30_3_sram[1] | No | No | No |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | Yes | No |
| mux_tree_size30_6_sram[2:3] | No | No | No |
| mux_tree_size30_6_sram[1] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[2:3] | No | No | No |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[1:4] | No | Yes | No |
| mux_tree_size30_9_sram[0] | No | No | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[1] | No | No | Yes |
| mux_tree_size4_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[1] | No | No | Yes |
| mux_tree_size4_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4979 | 58.06 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2622 | 61.15 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 468 | 26.93 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 367 | 42.23 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | No | No |
| mux_tree_size20_0_sram[0:3] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[3] | No | No | No |
| mux_tree_size20_11_sram[1:2] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | Yes | No |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | No | No |
| mux_tree_size20_16_sram[0:2] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[2] | No | No | No |
| mux_tree_size20_17_sram[0:1] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[1:4] | No | Yes | No |
| mux_tree_size20_1_sram[0] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | Yes | No |
| mux_tree_size20_21_sram[3] | No | No | No |
| mux_tree_size20_21_sram[0:2] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | No | No |
| mux_tree_size20_24_sram[1:3] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | Yes | No |
| mux_tree_size20_4_sram[2] | No | No | No |
| mux_tree_size20_4_sram[0:1] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | Yes | No |
| mux_tree_size20_6_sram[3] | No | No | No |
| mux_tree_size20_6_sram[0:2] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[1:4] | No | Yes | No |
| mux_tree_size20_8_sram[0] | No | No | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | No | Yes | No |
| mux_tree_size20_9_sram[2] | No | No | No |
| mux_tree_size20_9_sram[0:1] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | Yes | No |
| mux_tree_size30_10_sram[2] | No | No | No |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | No | No | No |
| mux_tree_size30_11_sram[0:2] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | No |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | No | No |
| mux_tree_size30_17_sram[0:3] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | No | No |
| mux_tree_size30_19_sram[0:3] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[2:4] | No | Yes | No |
| mux_tree_size30_22_sram[1] | No | No | No |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[1:4] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[1:4] | No | Yes | No |
| mux_tree_size30_3_sram[0] | No | No | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[1:2] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | No | No |
| mux_tree_size30_5_sram[1:2] | No | Yes | No |
| mux_tree_size30_5_sram[0] | No | No | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[1:4] | No | Yes | No |
| mux_tree_size30_8_sram[0] | No | No | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | Yes | No |
| mux_tree_size30_9_sram[3] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | No | No | Yes |
| mux_tree_size4_7_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 74 | 20.27 |
| Total Bits | 8576 | 4977 | 58.03 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2620 | 61.10 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 63 | 18.69 |
| Signal Bits | 1738 | 466 | 26.81 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 365 | 42.00 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | Yes | No |
| mux_tree_size20_0_sram[2] | No | No | No |
| mux_tree_size20_0_sram[0:1] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | No | No |
| mux_tree_size20_10_sram[0:3] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | No | Yes | No |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[1:4] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | No | Yes | No |
| mux_tree_size20_1_sram[0:1] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | Yes | No |
| mux_tree_size20_21_sram[2] | No | No | No |
| mux_tree_size20_21_sram[0:1] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | Yes | No |
| mux_tree_size20_24_sram[3] | No | No | No |
| mux_tree_size20_24_sram[0:2] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[2:4] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[2:4] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[1:4] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | No |
| mux_tree_size30_15_sram[2:3] | No | Yes | No |
| mux_tree_size30_15_sram[1] | No | No | No |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[1:4] | No | Yes | No |
| mux_tree_size30_17_sram[0] | No | No | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[2:4] | No | Yes | No |
| mux_tree_size30_19_sram[1] | No | No | No |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[3] | No | No | No |
| mux_tree_size30_20_sram[0:2] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | No | Yes | No |
| mux_tree_size30_26_sram[2] | No | No | No |
| mux_tree_size30_26_sram[0:1] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[2:3] | No | No | No |
| mux_tree_size30_28_sram[0:1] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | No |
| mux_tree_size30_29_sram[0:3] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[0:3] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | No | No |
| mux_tree_size30_4_sram[2:3] | No | Yes | No |
| mux_tree_size30_4_sram[0:1] | No | No | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | No |
| mux_tree_size30_7_sram[0:3] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | Yes | No |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[1] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | No | No | Yes |
| mux_tree_size4_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[1] | No | No | Yes |
| mux_tree_size4_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 135 | 36.99 |
| Total Bits | 8576 | 5232 | 61.01 |
| Total Bits 0->1 | 4288 | 2531 | 59.03 |
| Total Bits 1->0 | 4288 | 2701 | 62.99 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4566 | 66.77 |
| Port Bits 0->1 | 3419 | 2283 | 66.77 |
| Port Bits 1->0 | 3419 | 2283 | 66.77 |
| Signals | 337 | 122 | 36.20 |
| Signal Bits | 1738 | 666 | 38.32 |
| Signal Bits 0->1 | 869 | 248 | 28.54 |
| Signal Bits 1->0 | 869 | 418 | 48.10 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[3:9] | Yes | Yes | Yes | INPUT |
| clb_I0[2] | No | No | No | INPUT |
| clb_I0[0:1] | Yes | Yes | Yes | INPUT |
| clb_I1[6:9] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[1:2] | No | No | No | INPUT |
| clb_I1[0] | Yes | Yes | Yes | INPUT |
| clb_I2[8:9] | Yes | Yes | Yes | INPUT |
| clb_I2[7] | No | Yes | No | INPUT |
| clb_I2[3:6] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[0:1] | Yes | Yes | Yes | INPUT |
| clb_I3[7:9] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[3:5] | No | No | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[1:4] | No | Yes | No |
| mux_tree_size20_0_sram[0] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[1:2] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | Yes |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0:2] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0] | No | No | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | No | No |
| mux_tree_size20_14_sram[3] | No | Yes | No |
| mux_tree_size20_14_sram[1:2] | No | No | No |
| mux_tree_size20_14_sram[0] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | No | Yes |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[1] | No | Yes | No |
| mux_tree_size20_15_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | No | No |
| mux_tree_size20_16_sram[2:3] | No | Yes | No |
| mux_tree_size20_16_sram[0:1] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[1:4] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[0:2] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[2:4] | No | Yes | No |
| mux_tree_size20_22_sram[1] | No | No | No |
| mux_tree_size20_22_sram[0] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[2] | No | No | No |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[3] | No | Yes | No |
| mux_tree_size20_27_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | No | No |
| mux_tree_size20_3_sram[0:3] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | No | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1] | No | No | No |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:2] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[1:4] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[1] | No | No | No |
| mux_tree_size2_0_sram[0] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[3] | No | Yes | No |
| mux_tree_size30_12_sram[2] | No | No | Yes |
| mux_tree_size30_12_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0] | No | No | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[2] | No | No | Yes |
| mux_tree_size30_15_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | No | No |
| mux_tree_size30_16_sram[0:3] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | Yes | No |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[3] | No | No | No |
| mux_tree_size30_18_sram[2] | No | Yes | No |
| mux_tree_size30_18_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[0] | No | No | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[2] | No | No | Yes |
| mux_tree_size30_19_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[3] | No | No | No |
| mux_tree_size30_20_sram[0:2] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | No | Yes |
| mux_tree_size30_21_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[2:3] | No | Yes | No |
| mux_tree_size30_22_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[2] | No | Yes | No |
| mux_tree_size30_28_sram[1] | No | No | No |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | Yes |
| mux_tree_size30_2_sram[3] | No | No | No |
| mux_tree_size30_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[3] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | Yes |
| mux_tree_size30_4_sram[1] | No | No | No |
| mux_tree_size30_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[3] | No | Yes | No |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[0:1] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | No | Yes | No |
| mux_tree_size30_7_sram[2] | No | No | No |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | Yes | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | Yes | No |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | Yes | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | Yes | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 77 | 21.10 |
| Total Bits | 8576 | 4975 | 58.01 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2618 | 61.05 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 464 | 26.70 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 363 | 41.77 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[2:4] | No | Yes | No |
| mux_tree_size20_0_sram[1] | No | No | No |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[2:4] | No | Yes | No |
| mux_tree_size20_11_sram[1] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | Yes | No |
| mux_tree_size20_12_sram[1:3] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[1:4] | No | Yes | No |
| mux_tree_size20_13_sram[0] | No | No | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | No | No |
| mux_tree_size20_14_sram[1:3] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[1:4] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[2] | No | No | No |
| mux_tree_size20_17_sram[0:1] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | No | Yes | No |
| mux_tree_size20_1_sram[1] | No | No | No |
| mux_tree_size20_1_sram[0] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[2:4] | No | Yes | No |
| mux_tree_size20_20_sram[1] | No | No | No |
| mux_tree_size20_20_sram[0] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | Yes | No |
| mux_tree_size20_27_sram[3] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | No | No |
| mux_tree_size20_28_sram[1:3] | No | Yes | No |
| mux_tree_size20_28_sram[0] | No | No | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[1:2] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[2:4] | No | Yes | No |
| mux_tree_size20_4_sram[1] | No | No | No |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | No | No |
| mux_tree_size20_6_sram[0:3] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[1:4] | No | Yes | No |
| mux_tree_size20_7_sram[0] | No | No | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | No | No |
| mux_tree_size30_10_sram[0:3] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[1:4] | No | Yes | No |
| mux_tree_size30_18_sram[0] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[2:4] | No | Yes | No |
| mux_tree_size30_1_sram[1] | No | No | No |
| mux_tree_size30_1_sram[0] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[3] | No | No | No |
| mux_tree_size30_21_sram[0:2] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[1:4] | No | Yes | No |
| mux_tree_size30_22_sram[0] | No | No | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | No | No |
| mux_tree_size30_27_sram[1:3] | No | Yes | No |
| mux_tree_size30_27_sram[0] | No | No | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[3:4] | No | Yes | No |
| mux_tree_size30_28_sram[2] | No | No | No |
| mux_tree_size30_28_sram[0:1] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[2] | No | No | Yes |
| mux_tree_size4_2_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | No | No | Yes |
| mux_tree_size4_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0:1] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 79 | 21.64 |
| Total Bits | 8576 | 4963 | 57.87 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2605 | 60.75 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 450 | 25.89 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 349 | 40.16 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[3] | No | No | No |
| mux_tree_size20_11_sram[0:2] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | No | Yes | No |
| mux_tree_size20_13_sram[2] | No | No | No |
| mux_tree_size20_13_sram[0:1] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | No | No |
| mux_tree_size20_14_sram[0:2] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | Yes | No |
| mux_tree_size20_15_sram[3] | No | No | No |
| mux_tree_size20_15_sram[2] | No | Yes | No |
| mux_tree_size20_15_sram[1] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | No | No |
| mux_tree_size20_16_sram[2:3] | No | Yes | No |
| mux_tree_size20_16_sram[1] | No | No | No |
| mux_tree_size20_16_sram[0] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | No | No |
| mux_tree_size20_18_sram[2:3] | No | Yes | No |
| mux_tree_size20_18_sram[0:1] | No | No | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[3] | No | No | No |
| mux_tree_size20_19_sram[0:2] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[3] | No | Yes | No |
| mux_tree_size20_1_sram[2] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | No | No |
| mux_tree_size20_20_sram[2:3] | No | Yes | No |
| mux_tree_size20_20_sram[1] | No | No | No |
| mux_tree_size20_20_sram[0] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | Yes | No |
| mux_tree_size20_21_sram[2] | No | No | No |
| mux_tree_size20_21_sram[1] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | No | No | No |
| mux_tree_size20_22_sram[0:2] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[2] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | No | No | No |
| mux_tree_size20_28_sram[0:2] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | Yes | No |
| mux_tree_size20_2_sram[2:3] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[3] | No | No | No |
| mux_tree_size20_3_sram[2] | No | Yes | No |
| mux_tree_size20_3_sram[1] | No | No | No |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | No | No |
| mux_tree_size20_6_sram[0:3] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[2:4] | No | Yes | No |
| mux_tree_size20_7_sram[0:1] | No | No | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | Yes | No |
| mux_tree_size30_10_sram[2] | No | No | No |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | No |
| mux_tree_size30_14_sram[0:3] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[1:4] | No | Yes | No |
| mux_tree_size30_16_sram[0] | No | No | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[3:4] | No | Yes | No |
| mux_tree_size30_17_sram[2] | No | No | No |
| mux_tree_size30_17_sram[0:1] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[3:4] | No | No | No |
| mux_tree_size30_20_sram[0:2] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[2:3] | No | No | No |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[3:4] | No | No | No |
| mux_tree_size30_22_sram[0:2] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | Yes | No |
| mux_tree_size30_24_sram[3] | No | No | No |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | No | Yes | No |
| mux_tree_size30_25_sram[2] | No | No | No |
| mux_tree_size30_25_sram[0:1] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | No |
| mux_tree_size30_7_sram[0:3] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[1:4] | No | Yes | No |
| mux_tree_size30_9_sram[0] | No | No | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram[1] | No | No | Yes |
| mux_tree_size4_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0:1] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 137 | 37.53 |
| Total Bits | 8576 | 5243 | 61.14 |
| Total Bits 0->1 | 4288 | 2539 | 59.21 |
| Total Bits 1->0 | 4288 | 2704 | 63.06 |
| Ports | 28 | 15 | 53.57 |
| Port Bits | 6838 | 4569 | 66.82 |
| Port Bits 0->1 | 3419 | 2283 | 66.77 |
| Port Bits 1->0 | 3419 | 2286 | 66.86 |
| Signals | 337 | 122 | 36.20 |
| Signal Bits | 1738 | 674 | 38.78 |
| Signal Bits 0->1 | 869 | 256 | 29.46 |
| Signal Bits 1->0 | 869 | 418 | 48.10 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | Yes | Yes | Yes | INPUT |
| clb_I1[8:9] | No | No | No | INPUT |
| clb_I1[7] | No | Yes | No | INPUT |
| clb_I1[5:6] | Yes | Yes | Yes | INPUT |
| clb_I1[4] | No | No | No | INPUT |
| clb_I1[2:3] | Yes | Yes | Yes | INPUT |
| clb_I1[1] | No | Yes | No | INPUT |
| clb_I1[0] | Yes | Yes | Yes | INPUT |
| clb_I2[8:9] | Yes | Yes | Yes | INPUT |
| clb_I2[7] | No | No | No | INPUT |
| clb_I2[3:6] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[1] | No | Yes | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[9] | No | No | No | INPUT |
| clb_I3[8] | No | Yes | No | INPUT |
| clb_I3[7] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[3:5] | No | No | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[3] | No | Yes | No |
| mux_tree_size20_10_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[1] | No | Yes | No |
| mux_tree_size20_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | Yes | No |
| mux_tree_size20_14_sram[2:3] | No | No | No |
| mux_tree_size20_14_sram[0:1] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | Yes | No |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[3] | No | Yes | No |
| mux_tree_size20_19_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[0:3] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | No | Yes | No |
| mux_tree_size20_24_sram[0:1] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[3] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[0:2] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | No | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[3:4] | No | Yes | No |
| mux_tree_size20_5_sram[1:2] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[3] | No | No | Yes |
| mux_tree_size20_6_sram[1:2] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:3] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | No | No |
| mux_tree_size20_9_sram[0:3] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[2] | No | No | Yes |
| mux_tree_size30_0_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[0] | No | No | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1] | No | Yes | No |
| mux_tree_size30_10_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[1:3] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[2] | No | Yes | No |
| mux_tree_size30_12_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | Yes |
| mux_tree_size30_14_sram[1] | No | Yes | No |
| mux_tree_size30_14_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1] | No | Yes | No |
| mux_tree_size30_15_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1] | No | No | No |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | Yes | No |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | Yes | No |
| mux_tree_size30_18_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[3] | No | No | No |
| mux_tree_size30_1_sram[0:2] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[0:1] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[1] | No | Yes | No |
| mux_tree_size30_21_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | No | Yes |
| mux_tree_size30_22_sram[3] | No | No | No |
| mux_tree_size30_22_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | No | No |
| mux_tree_size30_23_sram[0:3] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:2] | No | No | Yes |
| mux_tree_size30_24_sram[0] | No | No | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2] | No | Yes | No |
| mux_tree_size30_25_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | No | No |
| mux_tree_size30_26_sram[0:3] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | No | Yes |
| mux_tree_size30_27_sram[2] | No | Yes | No |
| mux_tree_size30_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[0] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[2] | No | No | Yes |
| mux_tree_size30_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[1] | No | Yes | No |
| mux_tree_size30_3_sram[0] | No | No | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[3] | No | No | No |
| mux_tree_size30_7_sram[2] | No | Yes | No |
| mux_tree_size30_7_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | No | No | Yes |
| mux_tree_size4_1_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[1:2] | No | No | Yes |
| mux_tree_size4_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | No | No | Yes |
| mux_tree_size4_6_sram[1] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | Yes | Yes | Yes |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | Yes | No |
| mux_tree_size30_22_out | No | Yes | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 111 | 30.41 |
| Total Bits | 8576 | 5145 | 59.99 |
| Total Bits 0->1 | 4288 | 2462 | 57.42 |
| Total Bits 1->0 | 4288 | 2683 | 62.57 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4536 | 66.34 |
| Port Bits 0->1 | 3419 | 2265 | 66.25 |
| Port Bits 1->0 | 3419 | 2271 | 66.42 |
| Signals | 337 | 98 | 29.08 |
| Signal Bits | 1738 | 609 | 35.04 |
| Signal Bits 0->1 | 869 | 197 | 22.67 |
| Signal Bits 1->0 | 869 | 412 | 47.41 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | Yes | No | INPUT |
| clb_I0[8] | No | No | No | INPUT |
| clb_I0[7] | Yes | Yes | Yes | INPUT |
| clb_I0[5:6] | No | No | No | INPUT |
| clb_I0[3:4] | Yes | Yes | Yes | INPUT |
| clb_I0[2] | No | No | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | Yes | No | INPUT |
| clb_I1[8:9] | No | No | No | INPUT |
| clb_I1[7] | No | Yes | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[5] | No | Yes | No | INPUT |
| clb_I1[2:4] | No | No | No | INPUT |
| clb_I1[1] | No | Yes | No | INPUT |
| clb_I1[0] | No | No | No | INPUT |
| clb_I2[9] | No | No | No | INPUT |
| clb_I2[8] | Yes | Yes | Yes | INPUT |
| clb_I2[2:7] | No | No | No | INPUT |
| clb_I2[1] | No | Yes | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[9] | No | Yes | No | INPUT |
| clb_I3[0:8] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[3] | No | No | No |
| mux_tree_size20_0_sram[2] | No | Yes | No |
| mux_tree_size20_0_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[0:1] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[2] | No | Yes | No |
| mux_tree_size20_13_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | No | No |
| mux_tree_size20_14_sram[0:3] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[1:2] | No | Yes | No |
| mux_tree_size20_15_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | No | No |
| mux_tree_size20_18_sram[0:3] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[0:3] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[2:4] | No | Yes | No |
| mux_tree_size20_20_sram[0:1] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[2:4] | No | Yes | No |
| mux_tree_size20_21_sram[1] | No | No | No |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | Yes | No |
| mux_tree_size20_23_sram[3] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[3] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[4] | No | No | No |
| mux_tree_size20_26_sram[0:3] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[2] | No | Yes | No |
| mux_tree_size20_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | Yes | No |
| mux_tree_size20_28_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[1:4] | No | Yes | No |
| mux_tree_size20_2_sram[0] | No | No | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[0:1] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | No |
| mux_tree_size20_4_sram[0:3] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | No | Yes | No |
| mux_tree_size20_6_sram[1] | No | No | No |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[2] | No | No | No |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1:2] | No | Yes | No |
| mux_tree_size30_10_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | Yes | No |
| mux_tree_size30_11_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0:2] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0:2] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | No | No |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0:2] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[2:4] | No | Yes | No |
| mux_tree_size30_18_sram[1] | No | No | No |
| mux_tree_size30_18_sram[0] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[2:3] | No | No | No |
| mux_tree_size30_19_sram[0:1] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[3] | No | Yes | No |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0:1] | No | No | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[3] | No | No | No |
| mux_tree_size30_20_sram[0:2] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[2] | No | No | No |
| mux_tree_size30_23_sram[0:1] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2] | No | Yes | No |
| mux_tree_size30_25_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | Yes | No |
| mux_tree_size30_28_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0:1] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | No | No |
| mux_tree_size30_4_sram[0:3] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | Yes | No |
| mux_tree_size30_5_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[1] | No | Yes | No |
| mux_tree_size30_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[1] | No | Yes | No |
| mux_tree_size30_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[2] | No | Yes | No |
| mux_tree_size30_7_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[1] | No | Yes | No |
| mux_tree_size30_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[2:4] | No | Yes | No |
| mux_tree_size30_9_sram[1] | No | No | No |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | Yes | No |
| mux_tree_size30_2_out | No | Yes | No |
| mux_tree_size20_0_out | No | Yes | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | Yes | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | Yes | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | Yes | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | Yes | No |
| mux_tree_size20_28_out | No | Yes | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 75 | 20.55 |
| Total Bits | 8576 | 4971 | 57.96 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2613 | 60.94 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 63 | 18.69 |
| Signal Bits | 1738 | 458 | 26.35 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 357 | 41.08 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | No | No |
| mux_tree_size20_11_sram[3] | No | Yes | No |
| mux_tree_size20_11_sram[0:2] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | No | Yes | No |
| mux_tree_size20_12_sram[2] | No | No | No |
| mux_tree_size20_12_sram[0:1] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[4] | No | No | No |
| mux_tree_size20_14_sram[3] | No | Yes | No |
| mux_tree_size20_14_sram[2] | No | No | No |
| mux_tree_size20_14_sram[0:1] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[3] | No | No | No |
| mux_tree_size20_19_sram[0:2] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[3:4] | No | Yes | No |
| mux_tree_size20_20_sram[2] | No | No | No |
| mux_tree_size20_20_sram[0:1] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[2:4] | No | Yes | No |
| mux_tree_size20_21_sram[0:1] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[1:2] | No | No | No |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[1:3] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[1:4] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[3] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | No | No |
| mux_tree_size20_4_sram[0:2] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[3:4] | No | Yes | No |
| mux_tree_size30_0_sram[2] | No | No | No |
| mux_tree_size30_0_sram[1] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[3] | No | No | No |
| mux_tree_size30_13_sram[2] | No | Yes | No |
| mux_tree_size30_13_sram[1] | No | No | No |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[2:4] | No | Yes | No |
| mux_tree_size30_14_sram[1] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | No |
| mux_tree_size30_1_sram[2:3] | No | Yes | No |
| mux_tree_size30_1_sram[1] | No | No | No |
| mux_tree_size30_1_sram[0] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | Yes | No |
| mux_tree_size30_2_sram[2:3] | No | No | No |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[0:3] | No | No | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | No | No | Yes |
| mux_tree_size4_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | No | No | Yes |
| mux_tree_size4_1_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[0] | No | No | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[1] | No | No | Yes |
| mux_tree_size4_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0:1] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 142 | 38.90 |
| Total Bits | 8576 | 5223 | 60.90 |
| Total Bits 0->1 | 4288 | 2534 | 59.10 |
| Total Bits 1->0 | 4288 | 2689 | 62.71 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4566 | 66.77 |
| Port Bits 0->1 | 3419 | 2283 | 66.77 |
| Port Bits 1->0 | 3419 | 2283 | 66.77 |
| Signals | 337 | 129 | 38.28 |
| Signal Bits | 1738 | 657 | 37.80 |
| Signal Bits 0->1 | 869 | 251 | 28.88 |
| Signal Bits 1->0 | 869 | 406 | 46.72 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[5:9] | Yes | Yes | Yes | INPUT |
| clb_I0[4] | No | No | No | INPUT |
| clb_I0[0:3] | Yes | Yes | Yes | INPUT |
| clb_I1[6:9] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[2:3] | Yes | Yes | Yes | INPUT |
| clb_I1[1] | No | Yes | No | INPUT |
| clb_I1[0] | No | No | No | INPUT |
| clb_I2[8:9] | Yes | Yes | Yes | INPUT |
| clb_I2[6:7] | No | No | No | INPUT |
| clb_I2[3:5] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[0:1] | Yes | Yes | Yes | INPUT |
| clb_I3[7:9] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[5] | No | No | No | INPUT |
| clb_I3[4] | Yes | Yes | Yes | INPUT |
| clb_I3[3] | No | No | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | Yes | No |
| mux_tree_size20_0_sram[2] | No | No | No |
| mux_tree_size20_0_sram[0:1] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[3] | No | No | No |
| mux_tree_size20_11_sram[0:2] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | No | No |
| mux_tree_size20_14_sram[0:2] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | No | No |
| mux_tree_size20_15_sram[3] | No | Yes | No |
| mux_tree_size20_15_sram[2] | No | No | No |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[1:4] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[1:4] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[1] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[3] | No | No | Yes |
| mux_tree_size20_19_sram[2] | No | No | No |
| mux_tree_size20_19_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[3:4] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[1] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[1:2] | No | Yes | No |
| mux_tree_size20_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | No | No |
| mux_tree_size20_23_sram[3] | No | Yes | No |
| mux_tree_size20_23_sram[2] | No | No | No |
| mux_tree_size20_23_sram[0:1] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | No | No | No |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[2] | No | No | No |
| mux_tree_size20_25_sram[0:1] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[2:4] | No | Yes | No |
| mux_tree_size20_29_sram[1] | No | No | No |
| mux_tree_size20_29_sram[0] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[2] | No | Yes | No |
| mux_tree_size20_6_sram[1] | No | No | No |
| mux_tree_size20_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:2] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[0] | No | No | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | No | Yes |
| mux_tree_size30_11_sram[3] | No | Yes | No |
| mux_tree_size30_11_sram[2] | No | No | No |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[1:2] | No | Yes | No |
| mux_tree_size30_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[3] | No | No | No |
| mux_tree_size30_13_sram[0:2] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | No | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[1] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | Yes |
| mux_tree_size30_15_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1:2] | No | No | No |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | Yes | No |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | Yes |
| mux_tree_size30_18_sram[1:3] | No | Yes | No |
| mux_tree_size30_18_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[3] | No | Yes | No |
| mux_tree_size30_19_sram[2] | No | No | Yes |
| mux_tree_size30_19_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | Yes |
| mux_tree_size30_1_sram[2:3] | No | Yes | No |
| mux_tree_size30_1_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[3] | No | No | Yes |
| mux_tree_size30_20_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[0:1] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[2:3] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | Yes | No |
| mux_tree_size30_22_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | No | No |
| mux_tree_size30_26_sram[1:3] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | No | Yes |
| mux_tree_size30_27_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[2] | No | No | Yes |
| mux_tree_size30_27_sram[1] | No | Yes | No |
| mux_tree_size30_27_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[0:2] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[2:4] | No | Yes | No |
| mux_tree_size30_29_sram[1] | No | No | No |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[3] | No | Yes | No |
| mux_tree_size30_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[1] | No | Yes | No |
| mux_tree_size30_3_sram[0] | No | No | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[1:2] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[1:3] | No | Yes | No |
| mux_tree_size30_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[2:3] | No | Yes | No |
| mux_tree_size30_7_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[1:2] | No | No | No |
| mux_tree_size30_8_sram[0] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[1] | No | No | Yes |
| mux_tree_size4_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 77 | 21.10 |
| Total Bits | 8576 | 4984 | 58.12 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2627 | 61.26 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 473 | 27.22 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 372 | 42.81 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | No | No | No |
| mux_tree_size20_10_sram[0:2] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[1:4] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[2:4] | No | Yes | No |
| mux_tree_size20_22_sram[1] | No | No | No |
| mux_tree_size20_22_sram[0] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[1:4] | No | Yes | No |
| mux_tree_size20_23_sram[0] | No | No | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[1:2] | No | No | No |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[2:4] | No | Yes | No |
| mux_tree_size20_28_sram[1] | No | No | No |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[3:4] | No | Yes | No |
| mux_tree_size20_29_sram[0:2] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[1:4] | No | Yes | No |
| mux_tree_size20_3_sram[0] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[3:4] | No | Yes | No |
| mux_tree_size20_8_sram[2] | No | No | No |
| mux_tree_size20_8_sram[0:1] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | Yes | No |
| mux_tree_size20_9_sram[3] | No | No | No |
| mux_tree_size20_9_sram[0:2] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | No | No | No |
| mux_tree_size30_10_sram[0:2] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[3] | No | No | No |
| mux_tree_size30_12_sram[0:2] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[2:3] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | No | No |
| mux_tree_size30_14_sram[0:2] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[0:2] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[0:3] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[1:4] | No | Yes | No |
| mux_tree_size30_21_sram[0] | No | No | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[1] | No | No | No |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[1:4] | No | Yes | No |
| mux_tree_size30_29_sram[0] | No | No | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | No | No | Yes |
| mux_tree_size4_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 79 | 21.64 |
| Total Bits | 8576 | 4975 | 58.01 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2618 | 61.05 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 68 | 20.18 |
| Signal Bits | 1738 | 464 | 26.70 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 363 | 41.77 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[3] | No | No | No |
| mux_tree_size20_11_sram[0:2] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[2:4] | No | Yes | No |
| mux_tree_size20_16_sram[1] | No | No | No |
| mux_tree_size20_16_sram[0] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[2] | No | No | No |
| mux_tree_size20_17_sram[0:1] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[2] | No | No | No |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[2:4] | No | Yes | No |
| mux_tree_size20_27_sram[1] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[1:4] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | No |
| mux_tree_size20_4_sram[0:3] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | No | No |
| mux_tree_size20_5_sram[2:3] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | Yes | No |
| mux_tree_size20_6_sram[0:3] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[3:4] | No | Yes | No |
| mux_tree_size20_8_sram[2] | No | No | No |
| mux_tree_size20_8_sram[1] | No | Yes | No |
| mux_tree_size20_8_sram[0] | No | No | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[1] | No | Yes | No |
| mux_tree_size2_0_sram[0] | No | No | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | No | No |
| mux_tree_size30_10_sram[0:2] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[1:4] | No | Yes | No |
| mux_tree_size30_11_sram[0] | No | No | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | Yes | No |
| mux_tree_size30_12_sram[2] | No | No | No |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | No | Yes | No |
| mux_tree_size30_15_sram[2] | No | No | No |
| mux_tree_size30_15_sram[0:1] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | Yes | No |
| mux_tree_size30_16_sram[3] | No | No | No |
| mux_tree_size30_16_sram[0:2] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[0:2] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[1:4] | No | Yes | No |
| mux_tree_size30_20_sram[0] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[3:4] | No | Yes | No |
| mux_tree_size30_21_sram[2] | No | No | No |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[1:4] | No | Yes | No |
| mux_tree_size30_24_sram[0] | No | No | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[1:4] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[0:3] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | Yes | No |
| mux_tree_size30_9_sram[2:3] | No | No | No |
| mux_tree_size30_9_sram[1] | No | Yes | No |
| mux_tree_size30_9_sram[0] | No | No | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[0] | No | No | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 94 | 25.75 |
| Total Bits | 8576 | 5076 | 59.19 |
| Total Bits 0->1 | 4288 | 2432 | 56.72 |
| Total Bits 1->0 | 4288 | 2644 | 61.66 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4543 | 66.44 |
| Port Bits 0->1 | 3419 | 2272 | 66.45 |
| Port Bits 1->0 | 3419 | 2271 | 66.42 |
| Signals | 337 | 83 | 24.63 |
| Signal Bits | 1738 | 533 | 30.67 |
| Signal Bits 0->1 | 869 | 160 | 18.41 |
| Signal Bits 1->0 | 869 | 373 | 42.92 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[7] | No | No | No | INPUT |
| clb_I0[6] | Yes | Yes | Yes | INPUT |
| clb_I0[5] | No | No | No | INPUT |
| clb_I0[4] | Yes | Yes | Yes | INPUT |
| clb_I0[2:3] | No | No | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | No | No | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[8] | No | No | No | INPUT |
| clb_I1[5:7] | Yes | Yes | Yes | INPUT |
| clb_I1[4] | No | No | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[0:2] | No | No | No | INPUT |
| clb_I2[9] | Yes | Yes | Yes | INPUT |
| clb_I2[6:8] | No | No | No | INPUT |
| clb_I2[4:5] | Yes | Yes | Yes | INPUT |
| clb_I2[3] | No | No | No | INPUT |
| clb_I2[0:2] | Yes | Yes | Yes | INPUT |
| clb_I3[7:9] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[0:5] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[1:2] | No | Yes | No |
| mux_tree_size20_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | Yes | No |
| mux_tree_size20_13_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0:2] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | Yes | No |
| mux_tree_size20_14_sram[1:2] | No | No | No |
| mux_tree_size20_14_sram[0] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[2:3] | No | No | Yes |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | Yes | No |
| mux_tree_size20_16_sram[1:3] | No | No | No |
| mux_tree_size20_16_sram[0] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | No | No |
| mux_tree_size20_17_sram[0:1] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[3] | No | Yes | No |
| mux_tree_size20_18_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[3] | No | No | No |
| mux_tree_size20_19_sram[0:2] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[1:2] | No | No | No |
| mux_tree_size20_1_sram[0] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[2] | No | Yes | No |
| mux_tree_size20_21_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[0] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[1:2] | No | No | No |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[1:4] | No | Yes | No |
| mux_tree_size20_26_sram[0] | No | No | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[1:4] | No | Yes | No |
| mux_tree_size20_28_sram[0] | No | No | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | No | No |
| mux_tree_size20_2_sram[2:3] | No | Yes | No |
| mux_tree_size20_2_sram[1] | No | No | No |
| mux_tree_size20_2_sram[0] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[3] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[1:4] | No | Yes | No |
| mux_tree_size20_5_sram[0] | No | No | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | No | Yes | No |
| mux_tree_size20_6_sram[2] | No | No | No |
| mux_tree_size20_6_sram[0:1] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[2:4] | No | Yes | No |
| mux_tree_size20_7_sram[1] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | No | No |
| mux_tree_size30_0_sram[3] | No | Yes | No |
| mux_tree_size30_0_sram[2] | No | No | No |
| mux_tree_size30_0_sram[0:1] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[2] | No | No | Yes |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[2:3] | No | No | No |
| mux_tree_size30_11_sram[0:1] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | No | No |
| mux_tree_size30_14_sram[1:3] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | No | Yes | No |
| mux_tree_size30_15_sram[1] | No | No | No |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0:2] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | No | Yes | No |
| mux_tree_size30_17_sram[1] | No | No | No |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0:3] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[1:4] | No | Yes | No |
| mux_tree_size30_1_sram[0] | No | No | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[3:4] | No | Yes | No |
| mux_tree_size30_21_sram[2] | No | No | No |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[3] | No | Yes | No |
| mux_tree_size30_24_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2:3] | No | Yes | No |
| mux_tree_size30_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[1:3] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[2] | No | No | No |
| mux_tree_size30_29_sram[1] | No | Yes | No |
| mux_tree_size30_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | Yes | No |
| mux_tree_size30_2_sram[3] | No | No | No |
| mux_tree_size30_2_sram[0:2] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | Yes | No |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[0:1] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | Yes |
| mux_tree_size30_7_sram[3] | No | Yes | No |
| mux_tree_size30_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[1] | No | Yes | No |
| mux_tree_size30_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[2] | No | Yes | No |
| mux_tree_size30_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | No | No | Yes |
| mux_tree_size4_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | Yes | Yes | Yes |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 77 | 21.10 |
| Total Bits | 8576 | 4977 | 58.03 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2619 | 61.08 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 65 | 19.29 |
| Signal Bits | 1738 | 464 | 26.70 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 363 | 41.77 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[3] | No | No | No |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | Yes | No |
| mux_tree_size20_10_sram[3] | No | No | No |
| mux_tree_size20_10_sram[2] | No | Yes | No |
| mux_tree_size20_10_sram[1] | No | No | No |
| mux_tree_size20_10_sram[0] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | Yes | No |
| mux_tree_size20_17_sram[3] | No | No | No |
| mux_tree_size20_17_sram[0:2] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[3:4] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[1:4] | No | Yes | No |
| mux_tree_size20_19_sram[0] | No | No | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[2] | No | No | No |
| mux_tree_size20_23_sram[0:1] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | No | No |
| mux_tree_size20_24_sram[0:2] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[1:4] | No | Yes | No |
| mux_tree_size20_25_sram[0] | No | No | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[2] | No | No | No |
| mux_tree_size20_27_sram[0:1] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[2:4] | No | Yes | No |
| mux_tree_size20_29_sram[1] | No | No | No |
| mux_tree_size20_29_sram[0] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | Yes | No |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[0:1] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | No | No |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[1] | No | No | No |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | No | Yes | No |
| mux_tree_size20_6_sram[1] | No | No | No |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[1:4] | No | Yes | No |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | No | No |
| mux_tree_size30_11_sram[0:3] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[2:4] | No | Yes | No |
| mux_tree_size30_13_sram[0:1] | No | No | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | Yes | No |
| mux_tree_size30_15_sram[3] | No | No | No |
| mux_tree_size30_15_sram[0:2] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[3:4] | No | Yes | No |
| mux_tree_size30_16_sram[2] | No | No | No |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[3:4] | No | Yes | No |
| mux_tree_size30_20_sram[0:2] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[1] | No | No | No |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[1] | No | No | No |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | Yes | No |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[0:1] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[2] | No | No | Yes |
| mux_tree_size4_2_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[1] | No | No | Yes |
| mux_tree_size4_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | No | No | Yes |
| mux_tree_size4_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 154 | 42.19 |
| Total Bits | 8576 | 5278 | 61.54 |
| Total Bits 0->1 | 4288 | 2557 | 59.63 |
| Total Bits 1->0 | 4288 | 2721 | 63.46 |
| Ports | 28 | 15 | 53.57 |
| Port Bits | 6838 | 4571 | 66.85 |
| Port Bits 0->1 | 3419 | 2284 | 66.80 |
| Port Bits 1->0 | 3419 | 2287 | 66.89 |
| Signals | 337 | 139 | 41.25 |
| Signal Bits | 1738 | 707 | 40.68 |
| Signal Bits 0->1 | 869 | 273 | 31.42 |
| Signal Bits 1->0 | 869 | 434 | 49.94 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[5:9] | Yes | Yes | Yes | INPUT |
| clb_I0[4] | No | No | No | INPUT |
| clb_I0[2:3] | Yes | Yes | Yes | INPUT |
| clb_I0[1] | No | Yes | No | INPUT |
| clb_I0[0] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[8] | No | No | No | INPUT |
| clb_I1[7] | Yes | Yes | Yes | INPUT |
| clb_I1[6] | No | No | No | INPUT |
| clb_I1[5] | Yes | Yes | Yes | INPUT |
| clb_I1[4] | No | Yes | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[2] | No | No | No | INPUT |
| clb_I1[0:1] | Yes | Yes | Yes | INPUT |
| clb_I2[9] | Yes | Yes | Yes | INPUT |
| clb_I2[8] | No | Yes | No | INPUT |
| clb_I2[6:7] | Yes | Yes | Yes | INPUT |
| clb_I2[5] | No | Yes | No | INPUT |
| clb_I2[1:4] | Yes | Yes | Yes | INPUT |
| clb_I2[0] | No | No | No | INPUT |
| clb_I3[9] | No | No | No | INPUT |
| clb_I3[6:8] | Yes | Yes | Yes | INPUT |
| clb_I3[0:5] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | Yes | Yes | Yes | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | Yes | Yes | Yes | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[2] | No | Yes | No |
| mux_tree_size20_10_sram[0:1] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[2:3] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0:2] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[3] | No | No | Yes |
| mux_tree_size20_13_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0] | No | No | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[2:4] | No | Yes | No |
| mux_tree_size20_14_sram[1] | No | No | No |
| mux_tree_size20_14_sram[0] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[3:4] | No | Yes | No |
| mux_tree_size20_18_sram[2] | No | No | No |
| mux_tree_size20_18_sram[0:1] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | No | Yes |
| mux_tree_size20_19_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[2] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[2] | No | No | No |
| mux_tree_size20_23_sram[1] | No | Yes | No |
| mux_tree_size20_23_sram[0] | No | No | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[2] | No | Yes | No |
| mux_tree_size20_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | Yes | No |
| mux_tree_size20_28_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[0:2] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[1:4] | No | Yes | No |
| mux_tree_size20_3_sram[0] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | No | Yes |
| mux_tree_size20_6_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[3] | No | No | No |
| mux_tree_size20_8_sram[0:2] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1:2] | No | No | Yes |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0:3] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1] | No | No | Yes |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | Yes | No |
| mux_tree_size30_16_sram[2:3] | No | No | No |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[2:3] | No | Yes | No |
| mux_tree_size30_17_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | Yes | No |
| mux_tree_size30_18_sram[2:3] | No | No | Yes |
| mux_tree_size30_18_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[3] | No | No | Yes |
| mux_tree_size30_19_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0:1] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[3] | No | Yes | No |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[1] | No | Yes | No |
| mux_tree_size30_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | No | Yes |
| mux_tree_size30_21_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0] | No | No | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[1:2] | No | No | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | No | No |
| mux_tree_size30_23_sram[0:2] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2] | No | No | No |
| mux_tree_size30_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[3] | No | Yes | No |
| mux_tree_size30_26_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0:1] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[2] | No | No | Yes |
| mux_tree_size30_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | Yes | No |
| mux_tree_size30_5_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[2:4] | No | Yes | No |
| mux_tree_size30_7_sram[1] | No | No | No |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | Yes | No |
| mux_tree_size30_8_sram[3] | No | No | Yes |
| mux_tree_size30_8_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[1] | No | Yes | No |
| mux_tree_size30_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | Yes |
| mux_tree_size30_9_sram[3] | No | Yes | No |
| mux_tree_size30_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[1:2] | No | No | Yes |
| mux_tree_size4_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram[0] | No | No | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[0] | No | No | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | Yes | Yes | Yes |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | Yes | Yes | Yes |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | Yes | Yes | Yes |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | Yes | Yes | Yes |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | Yes | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | Yes | Yes | Yes |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | Yes | Yes | Yes |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | Yes | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | Yes | Yes | Yes |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | Yes | Yes | Yes |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | Yes | No |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | Yes | Yes | Yes |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | Yes | Yes | Yes |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | Yes | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | Yes | Yes | Yes |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | Yes | Yes | Yes |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | Yes | Yes | Yes |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | Yes | Yes | Yes |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | Yes | Yes | Yes |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | Yes | Yes | Yes |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | Yes | Yes | Yes |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | Yes | Yes | Yes |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | Yes | Yes | Yes |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | Yes | Yes | Yes |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 111 | 30.41 |
| Total Bits | 8576 | 5154 | 60.10 |
| Total Bits 0->1 | 4288 | 2482 | 57.88 |
| Total Bits 1->0 | 4288 | 2672 | 62.31 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4551 | 66.55 |
| Port Bits 0->1 | 3419 | 2276 | 66.57 |
| Port Bits 1->0 | 3419 | 2275 | 66.54 |
| Signals | 337 | 99 | 29.38 |
| Signal Bits | 1738 | 603 | 34.70 |
| Signal Bits 0->1 | 869 | 206 | 23.71 |
| Signal Bits 1->0 | 869 | 397 | 45.68 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[7] | No | No | No | INPUT |
| clb_I0[4:6] | Yes | Yes | Yes | INPUT |
| clb_I0[3] | No | No | No | INPUT |
| clb_I0[0:2] | Yes | Yes | Yes | INPUT |
| clb_I1[8:9] | No | No | No | INPUT |
| clb_I1[7] | Yes | Yes | Yes | INPUT |
| clb_I1[5:6] | No | No | No | INPUT |
| clb_I1[4] | Yes | Yes | Yes | INPUT |
| clb_I1[3] | No | No | No | INPUT |
| clb_I1[1:2] | Yes | Yes | Yes | INPUT |
| clb_I1[0] | No | No | No | INPUT |
| clb_I2[9] | No | No | No | INPUT |
| clb_I2[4:8] | Yes | Yes | Yes | INPUT |
| clb_I2[3] | No | No | No | INPUT |
| clb_I2[2] | Yes | Yes | Yes | INPUT |
| clb_I2[1] | No | No | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[6:9] | No | No | No | INPUT |
| clb_I3[5] | Yes | Yes | Yes | INPUT |
| clb_I3[0:4] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | No | Yes | No |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[1] | No | Yes | No |
| mux_tree_size20_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[2:4] | No | Yes | No |
| mux_tree_size20_15_sram[1] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[2:3] | No | No | No |
| mux_tree_size20_20_sram[0:1] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[1:2] | No | Yes | No |
| mux_tree_size20_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | No | No |
| mux_tree_size20_23_sram[0:3] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[1:4] | No | Yes | No |
| mux_tree_size20_25_sram[0] | No | No | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[3] | No | Yes | No |
| mux_tree_size20_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[0:2] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[2:4] | No | Yes | No |
| mux_tree_size20_8_sram[1] | No | No | No |
| mux_tree_size20_8_sram[0] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | No | Yes | No |
| mux_tree_size20_9_sram[2] | No | No | No |
| mux_tree_size20_9_sram[0:1] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | No | Yes |
| mux_tree_size30_10_sram[2] | No | Yes | No |
| mux_tree_size30_10_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | No | No |
| mux_tree_size30_11_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | No | No |
| mux_tree_size30_13_sram[3] | No | Yes | No |
| mux_tree_size30_13_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[1] | No | Yes | No |
| mux_tree_size30_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[1] | No | No | Yes |
| mux_tree_size30_14_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | No | Yes | No |
| mux_tree_size30_15_sram[2] | No | No | No |
| mux_tree_size30_15_sram[0:1] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1] | No | Yes | No |
| mux_tree_size30_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | No | No |
| mux_tree_size30_17_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | No | Yes |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | No | Yes | No |
| mux_tree_size30_19_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0:1] | No | No | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | No |
| mux_tree_size30_1_sram[0:3] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[3] | No | Yes | No |
| mux_tree_size30_20_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[0:1] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | Yes |
| mux_tree_size30_24_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1] | No | No | Yes |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[0:1] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[2] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | Yes | No |
| mux_tree_size30_2_sram[3] | No | No | No |
| mux_tree_size30_2_sram[2] | No | Yes | No |
| mux_tree_size30_2_sram[0:1] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | No | No |
| mux_tree_size30_6_sram[2:3] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[3] | No | No | No |
| mux_tree_size30_7_sram[0:2] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | Yes | No |
| mux_tree_size30_8_sram[1] | No | No | No |
| mux_tree_size30_8_sram[0] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | Yes | No |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | Yes | Yes | Yes |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 91 | 24.93 |
| Total Bits | 8576 | 5013 | 58.45 |
| Total Bits 0->1 | 4288 | 2381 | 55.53 |
| Total Bits 1->0 | 4288 | 2632 | 61.38 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4517 | 66.06 |
| Port Bits 0->1 | 3419 | 2259 | 66.07 |
| Port Bits 1->0 | 3419 | 2258 | 66.04 |
| Signals | 337 | 79 | 23.44 |
| Signal Bits | 1738 | 496 | 28.54 |
| Signal Bits 0->1 | 869 | 122 | 14.04 |
| Signal Bits 1->0 | 869 | 374 | 43.04 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[5:9] | No | No | No | INPUT |
| clb_I0[4] | Yes | Yes | Yes | INPUT |
| clb_I0[0:3] | No | No | No | INPUT |
| clb_I1[1:9] | No | No | No | INPUT |
| clb_I1[0] | Yes | Yes | Yes | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | Yes | Yes | Yes | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[2:4] | No | Yes | No |
| mux_tree_size20_0_sram[1] | No | No | No |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | No | Yes | No |
| mux_tree_size20_13_sram[0:2] | No | No | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[1:4] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[1:4] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | No | No |
| mux_tree_size20_21_sram[0:3] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[1:2] | No | No | No |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[2] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[1] | No | Yes | No |
| mux_tree_size2_0_sram[0] | No | No | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | No | No |
| mux_tree_size30_10_sram[2:3] | No | Yes | No |
| mux_tree_size30_10_sram[1] | No | No | No |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[3:4] | No | Yes | No |
| mux_tree_size30_11_sram[2] | No | No | No |
| mux_tree_size30_11_sram[0:1] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | No | No |
| mux_tree_size30_12_sram[0:2] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[1:3] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[3:4] | No | No | No |
| mux_tree_size30_17_sram[0:2] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[2:4] | No | Yes | No |
| mux_tree_size30_19_sram[1] | No | No | No |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | No | Yes | No |
| mux_tree_size30_1_sram[2] | No | No | No |
| mux_tree_size30_1_sram[0:1] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[2] | No | No | No |
| mux_tree_size30_23_sram[1] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[2:3] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[1] | No | No | No |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[0:3] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | Yes | No |
| mux_tree_size30_5_sram[3] | No | No | No |
| mux_tree_size30_5_sram[1:2] | No | Yes | No |
| mux_tree_size30_5_sram[0] | No | No | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[1:4] | No | Yes | No |
| mux_tree_size30_7_sram[0] | No | No | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[0] | No | No | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0:1] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | Yes | Yes | Yes |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | Yes | Yes | Yes |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | Yes | Yes | Yes |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | Yes | Yes | Yes |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | Yes | Yes | Yes |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | Yes | Yes | Yes |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | Yes | Yes | Yes |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | Yes | Yes | Yes |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | Yes | Yes | Yes |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | Yes | Yes | Yes |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 76 | 20.82 |
| Total Bits | 8576 | 4962 | 57.86 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2604 | 60.73 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 64 | 18.99 |
| Signal Bits | 1738 | 449 | 25.83 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 348 | 40.05 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | No | No |
| mux_tree_size20_10_sram[1:3] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | Yes | No |
| mux_tree_size20_11_sram[2:3] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | No | Yes | No |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | No | Yes | No |
| mux_tree_size20_13_sram[2] | No | No | No |
| mux_tree_size20_13_sram[0:1] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | No | No |
| mux_tree_size20_19_sram[0:3] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[1:4] | No | Yes | No |
| mux_tree_size20_20_sram[0] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | Yes | No |
| mux_tree_size20_21_sram[3] | No | No | No |
| mux_tree_size20_21_sram[1:2] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | No |
| mux_tree_size20_22_sram[3] | No | Yes | No |
| mux_tree_size20_22_sram[2] | No | No | No |
| mux_tree_size20_22_sram[0:1] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[1:4] | No | Yes | No |
| mux_tree_size20_23_sram[0] | No | No | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | Yes | No |
| mux_tree_size20_24_sram[0:3] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[2:4] | No | Yes | No |
| mux_tree_size20_26_sram[1] | No | No | No |
| mux_tree_size20_26_sram[0] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[1:4] | No | Yes | No |
| mux_tree_size20_28_sram[0] | No | No | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[0:2] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | No | No |
| mux_tree_size20_3_sram[0:3] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | Yes | No |
| mux_tree_size20_4_sram[3] | No | No | No |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[0:1] | No | No | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[1:4] | No | Yes | No |
| mux_tree_size20_5_sram[0] | No | No | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | No | Yes | No |
| mux_tree_size20_9_sram[2] | No | No | No |
| mux_tree_size20_9_sram[0:1] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[1:3] | No | No | No |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | No | Yes | No |
| mux_tree_size30_10_sram[1] | No | No | No |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | Yes | No |
| mux_tree_size30_12_sram[2] | No | No | No |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | No | Yes | No |
| mux_tree_size30_17_sram[1] | No | No | No |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[1:4] | No | Yes | No |
| mux_tree_size30_18_sram[0] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[3] | No | Yes | No |
| mux_tree_size30_20_sram[1:2] | No | No | No |
| mux_tree_size30_20_sram[0] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[2:3] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | No | Yes | No |
| mux_tree_size30_26_sram[2] | No | No | No |
| mux_tree_size30_26_sram[0:1] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[3:4] | No | No | No |
| mux_tree_size30_27_sram[0:2] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[1:4] | No | Yes | No |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | Yes | No |
| mux_tree_size30_8_sram[0:1] | No | No | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[2:4] | No | Yes | No |
| mux_tree_size30_9_sram[1] | No | No | No |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[1] | No | No | Yes |
| mux_tree_size4_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0:1] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 123 | 33.70 |
| Total Bits | 8576 | 5165 | 60.23 |
| Total Bits 0->1 | 4288 | 2486 | 57.98 |
| Total Bits 1->0 | 4288 | 2679 | 62.48 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4551 | 66.55 |
| Port Bits 0->1 | 3419 | 2274 | 66.51 |
| Port Bits 1->0 | 3419 | 2277 | 66.60 |
| Signals | 337 | 110 | 32.64 |
| Signal Bits | 1738 | 614 | 35.33 |
| Signal Bits 0->1 | 869 | 212 | 24.40 |
| Signal Bits 1->0 | 869 | 402 | 46.26 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | Yes | No | INPUT |
| clb_I0[5:8] | Yes | Yes | Yes | INPUT |
| clb_I0[4] | No | Yes | No | INPUT |
| clb_I0[2:3] | Yes | Yes | Yes | INPUT |
| clb_I0[1] | No | No | No | INPUT |
| clb_I0[0] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | No | No | No | INPUT |
| clb_I1[8] | Yes | Yes | Yes | INPUT |
| clb_I1[7] | No | No | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[3:5] | No | No | No | INPUT |
| clb_I1[2] | Yes | Yes | Yes | INPUT |
| clb_I1[1] | No | No | No | INPUT |
| clb_I1[0] | No | Yes | No | INPUT |
| clb_I2[7:9] | No | No | No | INPUT |
| clb_I2[6] | No | Yes | No | INPUT |
| clb_I2[5] | No | No | No | INPUT |
| clb_I2[2:4] | Yes | Yes | Yes | INPUT |
| clb_I2[0:1] | No | No | No | INPUT |
| clb_I3[9] | No | No | No | INPUT |
| clb_I3[8] | Yes | Yes | Yes | INPUT |
| clb_I3[7] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[3:5] | No | No | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | No | No |
| mux_tree_size20_0_sram[0:3] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[0:2] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[1:4] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[2] | No | Yes | No |
| mux_tree_size20_13_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[1] | No | Yes | No |
| mux_tree_size20_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | No | No |
| mux_tree_size20_1_sram[0:2] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[1:4] | No | Yes | No |
| mux_tree_size20_20_sram[0] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[2] | No | No | No |
| mux_tree_size20_25_sram[0:1] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | No | No |
| mux_tree_size20_28_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[1:4] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | Yes | No |
| mux_tree_size20_2_sram[3] | No | No | No |
| mux_tree_size20_2_sram[0:2] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[2:4] | No | Yes | No |
| mux_tree_size20_3_sram[1] | No | No | No |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[2:4] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[2] | No | No | Yes |
| mux_tree_size20_6_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:3] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | No | No |
| mux_tree_size30_0_sram[3] | No | No | Yes |
| mux_tree_size30_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1] | No | Yes | No |
| mux_tree_size30_10_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[1:2] | No | Yes | No |
| mux_tree_size30_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | Yes |
| mux_tree_size30_15_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1] | No | Yes | No |
| mux_tree_size30_15_sram[0] | No | No | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[2:3] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[1:2] | No | Yes | No |
| mux_tree_size30_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | No | Yes | No |
| mux_tree_size30_1_sram[2] | No | No | No |
| mux_tree_size30_1_sram[0:1] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[1:4] | No | Yes | No |
| mux_tree_size30_20_sram[0] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[1] | No | Yes | No |
| mux_tree_size30_21_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[2] | No | No | No |
| mux_tree_size30_22_sram[1] | No | Yes | No |
| mux_tree_size30_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[0:2] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:2] | No | No | Yes |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | No | Yes |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1] | No | No | Yes |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[0] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[2:3] | No | Yes | No |
| mux_tree_size30_2_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[2:3] | No | Yes | No |
| mux_tree_size30_3_sram[1] | No | No | No |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | No | No |
| mux_tree_size30_6_sram[2:3] | No | Yes | No |
| mux_tree_size30_6_sram[0:1] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | Yes | No |
| mux_tree_size30_8_sram[0:1] | No | No | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[2:4] | No | Yes | No |
| mux_tree_size30_9_sram[1] | No | No | No |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[1:2] | No | No | Yes |
| mux_tree_size4_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[1] | No | No | Yes |
| mux_tree_size4_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | No | No | Yes |
| mux_tree_size4_6_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | Yes | Yes | Yes |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | Yes | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | Yes | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 79 | 21.64 |
| Total Bits | 8576 | 4962 | 57.86 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2605 | 60.75 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 68 | 20.18 |
| Signal Bits | 1738 | 451 | 25.95 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 350 | 40.28 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | No | No |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | No | No |
| mux_tree_size20_10_sram[1:3] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | Yes | No |
| mux_tree_size20_13_sram[3] | No | No | No |
| mux_tree_size20_13_sram[2] | No | Yes | No |
| mux_tree_size20_13_sram[1] | No | No | No |
| mux_tree_size20_13_sram[0] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | No | No |
| mux_tree_size20_14_sram[0:2] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | No | No |
| mux_tree_size20_16_sram[0:2] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[3:4] | No | Yes | No |
| mux_tree_size20_19_sram[2] | No | No | No |
| mux_tree_size20_19_sram[0:1] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[2] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | Yes | No |
| mux_tree_size20_21_sram[3] | No | No | No |
| mux_tree_size20_21_sram[1:2] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[2:4] | No | Yes | No |
| mux_tree_size20_22_sram[1] | No | No | No |
| mux_tree_size20_22_sram[0] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | Yes | No |
| mux_tree_size20_23_sram[3] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | No | No |
| mux_tree_size20_24_sram[0:3] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[2] | No | No | No |
| mux_tree_size20_25_sram[0:1] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | No | No |
| mux_tree_size20_26_sram[0:2] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[2] | No | No | No |
| mux_tree_size20_27_sram[0:1] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | No | No |
| mux_tree_size20_28_sram[0:3] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[2:4] | No | Yes | No |
| mux_tree_size20_2_sram[1] | No | No | No |
| mux_tree_size20_2_sram[0] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[3] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | No | No |
| mux_tree_size20_5_sram[0:3] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[1:2] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[3:4] | No | No | No |
| mux_tree_size30_0_sram[0:2] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | No | Yes | No |
| mux_tree_size30_10_sram[0:1] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[2:3] | No | No | No |
| mux_tree_size30_11_sram[0:1] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[3] | No | No | No |
| mux_tree_size30_12_sram[0:2] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | No | Yes | No |
| mux_tree_size30_16_sram[1] | No | No | No |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | No | No |
| mux_tree_size30_21_sram[0:3] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[2:4] | No | Yes | No |
| mux_tree_size30_29_sram[1] | No | No | No |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[3:4] | No | No | No |
| mux_tree_size30_2_sram[0:2] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[2:4] | No | Yes | No |
| mux_tree_size30_3_sram[1] | No | No | No |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[2:4] | No | Yes | No |
| mux_tree_size30_4_sram[1] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | Yes | No |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[0:1] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | No | Yes | No |
| mux_tree_size30_7_sram[2] | No | No | No |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | No | No |
| mux_tree_size30_8_sram[2] | No | Yes | No |
| mux_tree_size30_8_sram[1] | No | No | No |
| mux_tree_size30_8_sram[0] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | No |
| mux_tree_size30_9_sram[0:3] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4977 | 58.03 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2619 | 61.08 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 464 | 26.70 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 363 | 41.77 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | No | No | No |
| mux_tree_size20_22_sram[0:2] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[1:2] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | Yes | No |
| mux_tree_size20_5_sram[3] | No | No | No |
| mux_tree_size20_5_sram[0:2] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | No | Yes | No |
| mux_tree_size20_6_sram[1:2] | No | No | No |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | No | No |
| mux_tree_size20_8_sram[0:3] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | No | No |
| mux_tree_size20_9_sram[0:3] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | No | No |
| mux_tree_size30_16_sram[0:3] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | No | No | No |
| mux_tree_size30_18_sram[1:2] | No | Yes | No |
| mux_tree_size30_18_sram[0] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | No | No |
| mux_tree_size30_19_sram[3] | No | Yes | No |
| mux_tree_size30_19_sram[2] | No | No | No |
| mux_tree_size30_19_sram[0:1] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[3] | No | No | No |
| mux_tree_size30_1_sram[0:2] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[1] | No | No | No |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | Yes | No |
| mux_tree_size30_23_sram[3] | No | No | No |
| mux_tree_size30_23_sram[0:2] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[0:3] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | No | No |
| mux_tree_size30_25_sram[3] | No | Yes | No |
| mux_tree_size30_25_sram[0:2] | No | No | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[2:4] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[3:4] | No | Yes | No |
| mux_tree_size30_4_sram[2] | No | No | No |
| mux_tree_size30_4_sram[0:1] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | Yes | No |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0:1] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 134 | 36.71 |
| Total Bits | 8576 | 5296 | 61.75 |
| Total Bits 0->1 | 4288 | 2568 | 59.89 |
| Total Bits 1->0 | 4288 | 2728 | 63.62 |
| Ports | 28 | 14 | 50.00 |
| Port Bits | 6838 | 4569 | 66.82 |
| Port Bits 0->1 | 3419 | 2279 | 66.66 |
| Port Bits 1->0 | 3419 | 2290 | 66.98 |
| Signals | 337 | 120 | 35.61 |
| Signal Bits | 1738 | 727 | 41.83 |
| Signal Bits 0->1 | 869 | 289 | 33.26 |
| Signal Bits 1->0 | 869 | 438 | 50.40 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | Yes | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[7] | No | No | No | INPUT |
| clb_I0[6] | Yes | Yes | Yes | INPUT |
| clb_I0[5] | No | Yes | No | INPUT |
| clb_I0[3:4] | Yes | Yes | Yes | INPUT |
| clb_I0[2] | No | Yes | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | Yes | No | INPUT |
| clb_I1[8:9] | Yes | Yes | Yes | INPUT |
| clb_I1[6:7] | No | Yes | No | INPUT |
| clb_I1[0:5] | Yes | Yes | Yes | INPUT |
| clb_I2[8:9] | No | No | No | INPUT |
| clb_I2[5:7] | No | Yes | No | INPUT |
| clb_I2[3:4] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[1] | Yes | Yes | Yes | INPUT |
| clb_I2[0] | No | Yes | No | INPUT |
| clb_I3[9] | No | No | No | INPUT |
| clb_I3[8] | No | Yes | No | INPUT |
| clb_I3[7] | No | No | No | INPUT |
| clb_I3[6] | Yes | Yes | Yes | INPUT |
| clb_I3[5] | No | No | No | INPUT |
| clb_I3[4] | Yes | Yes | Yes | INPUT |
| clb_I3[3] | No | Yes | No | INPUT |
| clb_I3[1:2] | Yes | Yes | Yes | INPUT |
| clb_I3[0] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[1:2] | No | Yes | No |
| mux_tree_size20_10_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[3] | No | No | Yes |
| mux_tree_size20_12_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | Yes | No |
| mux_tree_size20_14_sram[2] | No | No | No |
| mux_tree_size20_14_sram[0:1] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | Yes | No |
| mux_tree_size20_15_sram[3] | No | No | Yes |
| mux_tree_size20_15_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[3] | No | Yes | No |
| mux_tree_size20_19_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[2:4] | No | Yes | No |
| mux_tree_size20_20_sram[1] | No | No | No |
| mux_tree_size20_20_sram[0] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | No | No |
| mux_tree_size20_24_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[0:1] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[2:3] | No | Yes | No |
| mux_tree_size20_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | No | No | Yes |
| mux_tree_size20_28_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | No | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | No | No |
| mux_tree_size20_29_sram[3] | No | Yes | No |
| mux_tree_size20_29_sram[1:2] | No | No | No |
| mux_tree_size20_29_sram[0] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[1] | No | Yes | No |
| mux_tree_size20_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[3] | No | Yes | No |
| mux_tree_size20_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[3] | No | No | Yes |
| mux_tree_size20_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[2] | No | No | No |
| mux_tree_size20_9_sram[1] | No | Yes | No |
| mux_tree_size20_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[3] | No | Yes | No |
| mux_tree_size30_11_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[1] | No | No | No |
| mux_tree_size30_14_sram[0] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[3] | No | Yes | No |
| mux_tree_size30_15_sram[2] | No | No | Yes |
| mux_tree_size30_15_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1] | No | Yes | No |
| mux_tree_size30_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | No | Yes |
| mux_tree_size30_17_sram[2:3] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0:1] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[2:3] | No | Yes | No |
| mux_tree_size30_1_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[1:4] | No | Yes | No |
| mux_tree_size30_20_sram[0] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[2:3] | No | No | Yes |
| mux_tree_size30_21_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[0:1] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[1:4] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[1] | No | No | Yes |
| mux_tree_size30_27_sram[0] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[1:2] | No | Yes | No |
| mux_tree_size30_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[3] | No | No | Yes |
| mux_tree_size30_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[1:2] | No | Yes | No |
| mux_tree_size30_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[1:3] | No | Yes | No |
| mux_tree_size30_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | Yes | No |
| mux_tree_size30_6_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[1] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[2:3] | No | Yes | No |
| mux_tree_size30_7_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[3] | No | Yes | No |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[1] | No | No | Yes |
| mux_tree_size4_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | Yes | No |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | Yes | Yes | Yes |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | Yes | No |
| mux_tree_size30_5_out | No | Yes | No |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | No | Yes | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | Yes | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | Yes | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | Yes | No |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | No | Yes | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | Yes | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | No | Yes | No |
| mux_tree_size20_15_out | No | Yes | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | Yes | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | Yes | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | Yes | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | No | Yes | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 126 | 34.52 |
| Total Bits | 8576 | 5167 | 60.25 |
| Total Bits 0->1 | 4288 | 2482 | 57.88 |
| Total Bits 1->0 | 4288 | 2685 | 62.62 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4551 | 66.55 |
| Port Bits 0->1 | 3419 | 2274 | 66.51 |
| Port Bits 1->0 | 3419 | 2277 | 66.60 |
| Signals | 337 | 113 | 33.53 |
| Signal Bits | 1738 | 616 | 35.44 |
| Signal Bits 0->1 | 869 | 208 | 23.94 |
| Signal Bits 1->0 | 869 | 408 | 46.95 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | Yes | Yes | Yes | INPUT |
| clb_I0[8] | No | Yes | No | INPUT |
| clb_I0[6:7] | No | No | No | INPUT |
| clb_I0[4:5] | Yes | Yes | Yes | INPUT |
| clb_I0[2:3] | No | No | No | INPUT |
| clb_I0[0:1] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | No | Yes | No | INPUT |
| clb_I1[6:8] | Yes | Yes | Yes | INPUT |
| clb_I1[5] | No | Yes | No | INPUT |
| clb_I1[4] | No | No | No | INPUT |
| clb_I1[3] | No | Yes | No | INPUT |
| clb_I1[0:2] | No | No | No | INPUT |
| clb_I2[6:9] | Yes | Yes | Yes | INPUT |
| clb_I2[5] | No | No | No | INPUT |
| clb_I2[3:4] | Yes | Yes | Yes | INPUT |
| clb_I2[1:2] | No | No | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[2:9] | No | No | No | INPUT |
| clb_I3[1] | Yes | Yes | Yes | INPUT |
| clb_I3[0] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | No | No |
| mux_tree_size20_0_sram[0:3] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[2] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0:1] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | No | No |
| mux_tree_size20_15_sram[2:3] | No | Yes | No |
| mux_tree_size20_15_sram[1] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[1:4] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[1] | No | No | Yes |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[3] | No | Yes | No |
| mux_tree_size20_1_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[0] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | No |
| mux_tree_size20_22_sram[3] | No | Yes | No |
| mux_tree_size20_22_sram[1:2] | No | No | No |
| mux_tree_size20_22_sram[0] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[3] | No | Yes | No |
| mux_tree_size20_24_sram[2] | No | No | No |
| mux_tree_size20_24_sram[1] | No | No | Yes |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | Yes | No |
| mux_tree_size20_28_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[1] | No | No | Yes |
| mux_tree_size20_28_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[3] | No | No | No |
| mux_tree_size20_29_sram[0:2] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[2] | No | Yes | No |
| mux_tree_size20_3_sram[1] | No | No | No |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[2] | No | No | No |
| mux_tree_size20_6_sram[1] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[3] | No | No | No |
| mux_tree_size20_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[0] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[3] | No | No | No |
| mux_tree_size30_10_sram[0:2] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | No | No |
| mux_tree_size30_11_sram[0:3] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[2] | No | Yes | No |
| mux_tree_size30_13_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0:1] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[1:2] | No | Yes | No |
| mux_tree_size30_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[3] | No | Yes | No |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[1] | No | Yes | No |
| mux_tree_size30_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[3] | No | No | No |
| mux_tree_size30_20_sram[0:2] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | No | No |
| mux_tree_size30_22_sram[2] | No | Yes | No |
| mux_tree_size30_22_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[0:3] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | Yes | No |
| mux_tree_size30_25_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1] | No | Yes | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[3:4] | No | Yes | No |
| mux_tree_size30_27_sram[2] | No | No | No |
| mux_tree_size30_27_sram[0:1] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | No |
| mux_tree_size30_28_sram[0:3] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | No | No | Yes |
| mux_tree_size30_29_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[3:4] | No | Yes | No |
| mux_tree_size30_2_sram[2] | No | No | No |
| mux_tree_size30_2_sram[0:1] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[2] | No | Yes | No |
| mux_tree_size30_3_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[2:4] | No | Yes | No |
| mux_tree_size30_5_sram[1] | No | No | No |
| mux_tree_size30_5_sram[0] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | No | Yes | No |
| mux_tree_size30_6_sram[0] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[2:4] | No | Yes | No |
| mux_tree_size30_7_sram[1] | No | No | No |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | Yes | No |
| mux_tree_size30_8_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[0] | No | No | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | Yes | Yes | Yes |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | Yes | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 80 | 21.92 |
| Total Bits | 8576 | 4977 | 58.03 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2619 | 61.08 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 68 | 20.18 |
| Signal Bits | 1738 | 464 | 26.70 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 363 | 41.77 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | No | No |
| mux_tree_size20_12_sram[0:3] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[1:4] | No | Yes | No |
| mux_tree_size20_19_sram[0] | No | No | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | Yes | No |
| mux_tree_size20_1_sram[3] | No | No | No |
| mux_tree_size20_1_sram[0:2] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[3:4] | No | Yes | No |
| mux_tree_size20_20_sram[2] | No | No | No |
| mux_tree_size20_20_sram[0:1] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | Yes | No |
| mux_tree_size20_21_sram[3] | No | No | No |
| mux_tree_size20_21_sram[2] | No | Yes | No |
| mux_tree_size20_21_sram[1] | No | No | No |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | No | Yes | No |
| mux_tree_size20_24_sram[1] | No | No | No |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[2] | No | No | No |
| mux_tree_size20_27_sram[0:1] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | No | No | No |
| mux_tree_size20_28_sram[0:2] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | No | No |
| mux_tree_size20_2_sram[1:3] | No | Yes | No |
| mux_tree_size20_2_sram[0] | No | No | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | Yes | No |
| mux_tree_size20_3_sram[2:3] | No | No | No |
| mux_tree_size20_3_sram[0:1] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[1] | No | No | No |
| mux_tree_size2_0_sram[0] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[1:4] | No | Yes | No |
| mux_tree_size30_11_sram[0] | No | No | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | Yes | No |
| mux_tree_size30_12_sram[1:2] | No | No | No |
| mux_tree_size30_12_sram[0] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[2:4] | No | Yes | No |
| mux_tree_size30_13_sram[1] | No | No | No |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[3] | No | No | No |
| mux_tree_size30_14_sram[0:2] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | No |
| mux_tree_size30_15_sram[0:3] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[0:3] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | No | No |
| mux_tree_size30_21_sram[0:3] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | No | Yes | No |
| mux_tree_size30_23_sram[0] | No | No | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | No | Yes | No |
| mux_tree_size30_24_sram[2] | No | No | No |
| mux_tree_size30_24_sram[0:1] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | No | No | No |
| mux_tree_size30_25_sram[0:2] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | No | Yes | No |
| mux_tree_size30_3_sram[2] | No | No | No |
| mux_tree_size30_3_sram[0:1] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[2:4] | No | Yes | No |
| mux_tree_size30_4_sram[1] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | No | No | No |
| mux_tree_size30_7_sram[1:2] | No | Yes | No |
| mux_tree_size30_7_sram[0] | No | No | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | No |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | No | No |
| mux_tree_size30_9_sram[0:3] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[1] | No | No | Yes |
| mux_tree_size4_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 129 | 35.34 |
| Total Bits | 8576 | 5111 | 59.60 |
| Total Bits 0->1 | 4288 | 2454 | 57.23 |
| Total Bits 1->0 | 4288 | 2657 | 61.96 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4521 | 66.12 |
| Port Bits 0->1 | 3419 | 2261 | 66.13 |
| Port Bits 1->0 | 3419 | 2260 | 66.10 |
| Signals | 337 | 116 | 34.42 |
| Signal Bits | 1738 | 590 | 33.95 |
| Signal Bits 0->1 | 869 | 193 | 22.21 |
| Signal Bits 1->0 | 869 | 397 | 45.68 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[8:9] | Yes | Yes | Yes | INPUT |
| clb_I0[1:7] | No | No | No | INPUT |
| clb_I0[0] | Yes | Yes | Yes | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[1:4] | No | Yes | No |
| mux_tree_size20_0_sram[0] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[1:4] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | Yes | No |
| mux_tree_size20_15_sram[1:2] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | No | No |
| mux_tree_size20_20_sram[0:3] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | Yes | No |
| mux_tree_size20_22_sram[3] | No | No | No |
| mux_tree_size20_22_sram[0:2] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | No | No |
| mux_tree_size20_23_sram[0:3] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | Yes | No |
| mux_tree_size20_24_sram[2] | No | No | No |
| mux_tree_size20_24_sram[1] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[2] | No | No | No |
| mux_tree_size20_25_sram[0:1] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | Yes | No |
| mux_tree_size20_27_sram[3] | No | No | No |
| mux_tree_size20_27_sram[0:2] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | Yes | No |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[0:1] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | Yes | No |
| mux_tree_size20_6_sram[3] | No | No | No |
| mux_tree_size20_6_sram[0:2] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[1:3] | No | Yes | No |
| mux_tree_size20_7_sram[0] | No | No | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[1:4] | No | Yes | No |
| mux_tree_size20_8_sram[0] | No | No | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[2] | No | Yes | No |
| mux_tree_size30_0_sram[1] | No | No | Yes |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | No | No |
| mux_tree_size30_10_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1:2] | No | Yes | No |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | Yes | No |
| mux_tree_size30_11_sram[1] | No | No | Yes |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[1:3] | No | No | No |
| mux_tree_size30_12_sram[0] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | No | No | Yes |
| mux_tree_size30_13_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[3] | No | No | Yes |
| mux_tree_size30_14_sram[1:2] | No | Yes | No |
| mux_tree_size30_14_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | No | Yes | No |
| mux_tree_size30_15_sram[1] | No | No | No |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[3:4] | No | Yes | No |
| mux_tree_size30_16_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[3:4] | No | Yes | No |
| mux_tree_size30_17_sram[2] | No | No | Yes |
| mux_tree_size30_17_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[3] | No | Yes | No |
| mux_tree_size30_18_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[3] | No | No | No |
| mux_tree_size30_1_sram[0:2] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[3:4] | No | No | No |
| mux_tree_size30_20_sram[1:2] | No | No | Yes |
| mux_tree_size30_20_sram[0] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[2:4] | No | Yes | No |
| mux_tree_size30_22_sram[1] | No | No | No |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[2] | No | No | Yes |
| mux_tree_size30_23_sram[0:1] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | No | Yes | No |
| mux_tree_size30_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[2] | No | Yes | No |
| mux_tree_size30_28_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | Yes |
| mux_tree_size30_29_sram[3] | No | Yes | No |
| mux_tree_size30_29_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[1] | No | No | Yes |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[3:4] | No | Yes | No |
| mux_tree_size30_2_sram[2] | No | No | No |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[3] | No | No | Yes |
| mux_tree_size30_3_sram[0:2] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[2] | No | Yes | No |
| mux_tree_size30_4_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[0] | No | No | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | Yes | No |
| mux_tree_size30_5_sram[1:2] | No | No | No |
| mux_tree_size30_5_sram[0] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | Yes |
| mux_tree_size30_6_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[1:2] | No | Yes | No |
| mux_tree_size30_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[0] | No | No | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[0] | No | No | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | Yes | Yes | Yes |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | Yes | Yes | Yes |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | Yes | Yes | Yes |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 97 | 26.58 |
| Total Bits | 8576 | 5100 | 59.47 |
| Total Bits 0->1 | 4288 | 2446 | 57.04 |
| Total Bits 1->0 | 4288 | 2654 | 61.89 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4549 | 66.53 |
| Port Bits 0->1 | 3419 | 2275 | 66.54 |
| Port Bits 1->0 | 3419 | 2274 | 66.51 |
| Signals | 337 | 85 | 25.22 |
| Signal Bits | 1738 | 551 | 31.70 |
| Signal Bits 0->1 | 869 | 171 | 19.68 |
| Signal Bits 1->0 | 869 | 380 | 43.73 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[4:8] | Yes | Yes | Yes | INPUT |
| clb_I0[2:3] | No | No | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | No | No | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[7:8] | No | No | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[1:2] | No | No | No | INPUT |
| clb_I1[0] | Yes | Yes | Yes | INPUT |
| clb_I2[8:9] | Yes | Yes | Yes | INPUT |
| clb_I2[7] | No | No | No | INPUT |
| clb_I2[4:6] | Yes | Yes | Yes | INPUT |
| clb_I2[2:3] | No | No | No | INPUT |
| clb_I2[0:1] | Yes | Yes | Yes | INPUT |
| clb_I3[6:9] | No | No | No | INPUT |
| clb_I3[5] | Yes | Yes | Yes | INPUT |
| clb_I3[0:4] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[2:4] | No | Yes | No |
| mux_tree_size20_10_sram[1] | No | No | No |
| mux_tree_size20_10_sram[0] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | Yes |
| mux_tree_size20_13_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[1:2] | No | Yes | No |
| mux_tree_size20_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[1:4] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[2:4] | No | Yes | No |
| mux_tree_size20_15_sram[0:1] | No | No | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[1:3] | No | Yes | No |
| mux_tree_size20_1_sram[0] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[3] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[1:2] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | Yes |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | Yes |
| mux_tree_size20_22_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[1:2] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[2:4] | No | Yes | No |
| mux_tree_size20_23_sram[1] | No | No | No |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | Yes | No |
| mux_tree_size20_25_sram[1] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | No | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[2:4] | No | Yes | No |
| mux_tree_size20_29_sram[1] | No | No | No |
| mux_tree_size20_29_sram[0] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | No | No |
| mux_tree_size20_2_sram[0:2] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[1:4] | No | Yes | No |
| mux_tree_size20_5_sram[0] | No | No | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1] | No | No | No |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[1:3] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[1:4] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[3] | No | Yes | No |
| mux_tree_size30_10_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[3] | No | Yes | No |
| mux_tree_size30_11_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | No | Yes |
| mux_tree_size30_16_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | Yes | No |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | Yes |
| mux_tree_size30_18_sram[1:3] | No | No | No |
| mux_tree_size30_18_sram[0] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | No | No |
| mux_tree_size30_1_sram[0:3] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | Yes |
| mux_tree_size30_20_sram[0:3] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | No | No |
| mux_tree_size30_23_sram[0:3] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | Yes |
| mux_tree_size30_24_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2:3] | No | Yes | No |
| mux_tree_size30_25_sram[1] | No | No | No |
| mux_tree_size30_25_sram[0] | No | No | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | Yes | No |
| mux_tree_size30_29_sram[3] | No | No | No |
| mux_tree_size30_29_sram[0:2] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[3] | No | Yes | No |
| mux_tree_size30_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0] | No | No | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[3] | No | Yes | No |
| mux_tree_size30_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | Yes | No |
| mux_tree_size30_8_sram[3] | No | No | No |
| mux_tree_size30_8_sram[0:2] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[1] | No | No | Yes |
| mux_tree_size4_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 124 | 33.97 |
| Total Bits | 8576 | 5156 | 60.12 |
| Total Bits 0->1 | 4288 | 2487 | 58.00 |
| Total Bits 1->0 | 4288 | 2669 | 62.24 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4551 | 66.55 |
| Port Bits 0->1 | 3419 | 2274 | 66.51 |
| Port Bits 1->0 | 3419 | 2277 | 66.60 |
| Signals | 337 | 111 | 32.94 |
| Signal Bits | 1738 | 605 | 34.81 |
| Signal Bits 0->1 | 869 | 213 | 24.51 |
| Signal Bits 1->0 | 869 | 392 | 45.11 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | Yes | Yes | Yes | INPUT |
| clb_I0[8] | No | Yes | No | INPUT |
| clb_I0[4:7] | Yes | Yes | Yes | INPUT |
| clb_I0[3] | No | No | No | INPUT |
| clb_I0[0:2] | Yes | Yes | Yes | INPUT |
| clb_I1[7:9] | No | No | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[2] | No | Yes | No | INPUT |
| clb_I1[1] | No | No | No | INPUT |
| clb_I1[0] | No | Yes | No | INPUT |
| clb_I2[8:9] | No | No | No | INPUT |
| clb_I2[7] | Yes | Yes | Yes | INPUT |
| clb_I2[6] | No | No | No | INPUT |
| clb_I2[5] | Yes | Yes | Yes | INPUT |
| clb_I2[4] | No | No | No | INPUT |
| clb_I2[3] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[0:1] | Yes | Yes | Yes | INPUT |
| clb_I3[5:9] | No | No | No | INPUT |
| clb_I3[4] | No | Yes | No | INPUT |
| clb_I3[3] | No | No | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[1:3] | No | No | No |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[3] | No | Yes | No |
| mux_tree_size20_10_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[1] | No | No | Yes |
| mux_tree_size20_10_sram[0] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[2] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | Yes | No |
| mux_tree_size20_12_sram[3] | No | No | No |
| mux_tree_size20_12_sram[2] | No | Yes | No |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[0:1] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | Yes | No |
| mux_tree_size20_17_sram[3] | No | No | No |
| mux_tree_size20_17_sram[0:2] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[3] | No | No | Yes |
| mux_tree_size20_19_sram[1:2] | No | Yes | No |
| mux_tree_size20_19_sram[0] | No | No | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[3:4] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[1:2] | No | Yes | No |
| mux_tree_size20_27_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[3] | No | No | Yes |
| mux_tree_size20_28_sram[2] | No | No | No |
| mux_tree_size20_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | No | No |
| mux_tree_size20_29_sram[0:3] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[2:4] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[2:4] | No | Yes | No |
| mux_tree_size20_3_sram[0:1] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[1] | No | Yes | No |
| mux_tree_size20_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | No | No |
| mux_tree_size20_5_sram[0:3] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[3] | No | No | Yes |
| mux_tree_size20_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0:1] | No | No | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[0:3] | No | No | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | No | No |
| mux_tree_size30_0_sram[1:3] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[1:4] | No | Yes | No |
| mux_tree_size30_11_sram[0] | No | No | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[3] | No | No | Yes |
| mux_tree_size30_12_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0] | No | No | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | No | No |
| mux_tree_size30_13_sram[3] | No | Yes | No |
| mux_tree_size30_13_sram[2] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[2] | No | Yes | No |
| mux_tree_size30_15_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[2:3] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | No | No |
| mux_tree_size30_18_sram[3] | No | Yes | No |
| mux_tree_size30_18_sram[2] | No | No | No |
| mux_tree_size30_18_sram[0:1] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | No | Yes |
| mux_tree_size30_19_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[1] | No | Yes | No |
| mux_tree_size30_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0:3] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[3] | No | No | No |
| mux_tree_size30_20_sram[2] | No | Yes | No |
| mux_tree_size30_20_sram[0:1] | No | No | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[2:3] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | No | No | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[1] | No | Yes | No |
| mux_tree_size30_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:2] | No | Yes | No |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1:2] | No | Yes | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[3] | No | Yes | No |
| mux_tree_size30_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[0:1] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | No | No |
| mux_tree_size30_3_sram[1:3] | No | Yes | No |
| mux_tree_size30_3_sram[0] | No | No | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | Yes | No |
| mux_tree_size30_5_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[0] | No | No | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[0:1] | No | No | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[1] | No | No | Yes |
| mux_tree_size4_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | No | No | Yes |
| mux_tree_size4_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram[0] | No | No | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | No | Yes | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 100 | 27.40 |
| Total Bits | 8576 | 5087 | 59.32 |
| Total Bits 0->1 | 4288 | 2447 | 57.07 |
| Total Bits 1->0 | 4288 | 2640 | 61.57 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4543 | 66.44 |
| Port Bits 0->1 | 3419 | 2272 | 66.45 |
| Port Bits 1->0 | 3419 | 2271 | 66.42 |
| Signals | 337 | 87 | 25.82 |
| Signal Bits | 1738 | 544 | 31.30 |
| Signal Bits 0->1 | 869 | 175 | 20.14 |
| Signal Bits 1->0 | 869 | 369 | 42.46 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | Yes | Yes | Yes | INPUT |
| clb_I0[5:8] | No | No | No | INPUT |
| clb_I0[4] | Yes | Yes | Yes | INPUT |
| clb_I0[2:3] | No | No | No | INPUT |
| clb_I0[0:1] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[8] | No | No | No | INPUT |
| clb_I1[6:7] | Yes | Yes | Yes | INPUT |
| clb_I1[4:5] | No | No | No | INPUT |
| clb_I1[2:3] | Yes | Yes | Yes | INPUT |
| clb_I1[0:1] | No | No | No | INPUT |
| clb_I2[8:9] | No | No | No | INPUT |
| clb_I2[7] | Yes | Yes | Yes | INPUT |
| clb_I2[4:6] | No | No | No | INPUT |
| clb_I2[3] | Yes | Yes | Yes | INPUT |
| clb_I2[2] | No | No | No | INPUT |
| clb_I2[1] | Yes | Yes | Yes | INPUT |
| clb_I2[0] | No | No | No | INPUT |
| clb_I3[8:9] | No | No | No | INPUT |
| clb_I3[7] | Yes | Yes | Yes | INPUT |
| clb_I3[6] | No | No | No | INPUT |
| clb_I3[5] | Yes | Yes | Yes | INPUT |
| clb_I3[0:4] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[2] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | Yes | No |
| mux_tree_size20_12_sram[3] | No | No | No |
| mux_tree_size20_12_sram[0:2] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[1:4] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | No | No |
| mux_tree_size20_15_sram[3] | No | Yes | No |
| mux_tree_size20_15_sram[1:2] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | No | No |
| mux_tree_size20_16_sram[0:2] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | No | No |
| mux_tree_size20_19_sram[0:3] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[3] | No | No | No |
| mux_tree_size20_20_sram[1:2] | No | Yes | No |
| mux_tree_size20_20_sram[0] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | No | Yes |
| mux_tree_size20_21_sram[3] | No | Yes | No |
| mux_tree_size20_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | Yes | No |
| mux_tree_size20_22_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[2] | No | No | No |
| mux_tree_size20_22_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_23_sram[1] | No | No | Yes |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[1:2] | No | Yes | No |
| mux_tree_size20_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_25_sram[3] | No | No | Yes |
| mux_tree_size20_25_sram[2] | No | Yes | No |
| mux_tree_size20_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[4] | No | No | No |
| mux_tree_size20_26_sram[0:3] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[1] | No | No | No |
| mux_tree_size20_27_sram[0] | No | No | Yes |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_29_sram[1] | No | Yes | No |
| mux_tree_size20_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | Yes | No |
| mux_tree_size20_2_sram[2] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | Yes | No |
| mux_tree_size20_4_sram[2] | No | No | No |
| mux_tree_size20_4_sram[0:1] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | No | No |
| mux_tree_size20_8_sram[0:3] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | No | Yes | No |
| mux_tree_size30_0_sram[2:3] | No | No | No |
| mux_tree_size30_0_sram[0:1] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | No | No | No |
| mux_tree_size30_11_sram[1:2] | No | Yes | No |
| mux_tree_size30_11_sram[0] | No | No | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[3] | No | No | No |
| mux_tree_size30_13_sram[0:2] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[3] | No | No | Yes |
| mux_tree_size30_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | No | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[0] | No | No | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | No | Yes | No |
| mux_tree_size30_25_sram[1] | No | No | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | No | Yes | No |
| mux_tree_size30_26_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0:1] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | Yes |
| mux_tree_size30_28_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[2] | No | No | No |
| mux_tree_size30_28_sram[1] | No | No | Yes |
| mux_tree_size30_28_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0:2] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[0:3] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[0:1] | No | No | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[2:3] | No | No | No |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | No | No |
| mux_tree_size30_8_sram[0:2] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[0] | No | No | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[1] | No | No | Yes |
| mux_tree_size4_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0:1] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[1] | No | No | Yes |
| mux_tree_size4_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | Yes | Yes | Yes |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | Yes | Yes | Yes |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | Yes | Yes | Yes |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 122 | 33.42 |
| Total Bits | 8576 | 5170 | 60.28 |
| Total Bits 0->1 | 4288 | 2480 | 57.84 |
| Total Bits 1->0 | 4288 | 2690 | 62.73 |
| Ports | 28 | 13 | 46.43 |
| Port Bits | 6838 | 4550 | 66.54 |
| Port Bits 0->1 | 3419 | 2273 | 66.48 |
| Port Bits 1->0 | 3419 | 2277 | 66.60 |
| Signals | 337 | 109 | 32.34 |
| Signal Bits | 1738 | 620 | 35.67 |
| Signal Bits 0->1 | 869 | 207 | 23.82 |
| Signal Bits 1->0 | 869 | 413 | 47.53 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | Yes | Yes | Yes | INPUT |
| clb_I0[8] | No | No | No | INPUT |
| clb_I0[7] | No | Yes | No | INPUT |
| clb_I0[6] | Yes | Yes | Yes | INPUT |
| clb_I0[5] | No | Yes | No | INPUT |
| clb_I0[0:4] | Yes | Yes | Yes | INPUT |
| clb_I1[9] | No | Yes | No | INPUT |
| clb_I1[7:8] | Yes | Yes | Yes | INPUT |
| clb_I1[3:6] | No | No | No | INPUT |
| clb_I1[2] | Yes | Yes | Yes | INPUT |
| clb_I1[0:1] | No | No | No | INPUT |
| clb_I2[8:9] | No | No | No | INPUT |
| clb_I2[6:7] | Yes | Yes | Yes | INPUT |
| clb_I2[5] | No | No | No | INPUT |
| clb_I2[3:4] | Yes | Yes | Yes | INPUT |
| clb_I2[1:2] | No | No | No | INPUT |
| clb_I2[0] | No | Yes | No | INPUT |
| clb_I3[8:9] | No | No | No | INPUT |
| clb_I3[7] | No | Yes | No | INPUT |
| clb_I3[2:6] | No | No | No | INPUT |
| clb_I3[1] | Yes | Yes | Yes | INPUT |
| clb_I3[0] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | No | No |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[3] | No | Yes | No |
| mux_tree_size20_10_sram[2] | No | No | Yes |
| mux_tree_size20_10_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[0] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | No | No |
| mux_tree_size20_11_sram[0:2] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | No | Yes | No |
| mux_tree_size20_12_sram[0:1] | No | No | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[0] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[0:1] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[3] | No | No | No |
| mux_tree_size20_25_sram[0:2] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[2] | No | No | No |
| mux_tree_size20_26_sram[0:1] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[2:4] | No | Yes | No |
| mux_tree_size20_27_sram[0:1] | No | No | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2:3] | No | No | Yes |
| mux_tree_size20_28_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[1:4] | No | Yes | No |
| mux_tree_size20_2_sram[0] | No | No | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[2:4] | No | Yes | No |
| mux_tree_size20_3_sram[1] | No | No | No |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[1:2] | No | Yes | No |
| mux_tree_size20_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[3] | No | Yes | No |
| mux_tree_size20_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1] | No | No | Yes |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[3] | No | Yes | No |
| mux_tree_size20_7_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[3] | No | No | No |
| mux_tree_size20_8_sram[0:2] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[1:4] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[3] | No | Yes | No |
| mux_tree_size30_10_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[2] | No | Yes | No |
| mux_tree_size30_12_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[3] | No | No | No |
| mux_tree_size30_14_sram[0:2] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[2] | No | Yes | No |
| mux_tree_size30_15_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | No | Yes | No |
| mux_tree_size30_16_sram[1] | No | No | No |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[2:3] | No | Yes | No |
| mux_tree_size30_17_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[0:2] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | No | Yes | No |
| mux_tree_size30_1_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[3] | No | Yes | No |
| mux_tree_size30_21_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | Yes | No |
| mux_tree_size30_22_sram[3] | No | No | Yes |
| mux_tree_size30_22_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | No | No |
| mux_tree_size30_23_sram[0:3] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[3] | No | No | Yes |
| mux_tree_size30_24_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1] | No | Yes | No |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1] | No | No | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[1:4] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[0:2] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[0:2] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[3:4] | No | Yes | No |
| mux_tree_size30_29_sram[2] | No | No | No |
| mux_tree_size30_29_sram[0:1] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | Yes |
| mux_tree_size30_2_sram[3] | No | Yes | No |
| mux_tree_size30_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[1:3] | No | Yes | No |
| mux_tree_size30_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[2:4] | No | Yes | No |
| mux_tree_size30_6_sram[1] | No | No | No |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | No | Yes | No |
| mux_tree_size30_7_sram[2] | No | No | No |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0:1] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram[0] | No | No | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | No | Yes | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | No | Yes | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | Yes | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 79 | 21.64 |
| Total Bits | 8576 | 4985 | 58.13 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2628 | 61.29 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 68 | 20.18 |
| Signal Bits | 1738 | 474 | 27.27 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 373 | 42.92 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[2] | No | No | No |
| mux_tree_size20_11_sram[0:1] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | Yes | No |
| mux_tree_size20_12_sram[3] | No | No | No |
| mux_tree_size20_12_sram[0:2] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | Yes | No |
| mux_tree_size20_14_sram[2] | No | No | No |
| mux_tree_size20_14_sram[1] | No | Yes | No |
| mux_tree_size20_14_sram[0] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | No | No |
| mux_tree_size20_18_sram[0:3] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[0:3] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[2:4] | No | Yes | No |
| mux_tree_size20_20_sram[1] | No | No | No |
| mux_tree_size20_20_sram[0] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[2:4] | No | Yes | No |
| mux_tree_size20_23_sram[1] | No | No | No |
| mux_tree_size20_23_sram[0] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | Yes | No |
| mux_tree_size20_25_sram[1] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[1:4] | No | Yes | No |
| mux_tree_size20_2_sram[0] | No | No | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | No |
| mux_tree_size20_4_sram[0:3] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[4] | No | No | No |
| mux_tree_size20_6_sram[0:3] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[3] | No | No | No |
| mux_tree_size20_8_sram[0:2] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[2:4] | No | Yes | No |
| mux_tree_size20_9_sram[1] | No | No | No |
| mux_tree_size20_9_sram[0] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[2:3] | No | No | No |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[2:4] | No | Yes | No |
| mux_tree_size30_13_sram[1] | No | No | No |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | No | Yes | No |
| mux_tree_size30_16_sram[0:1] | No | No | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | No | Yes | No |
| mux_tree_size30_18_sram[2] | No | No | No |
| mux_tree_size30_18_sram[0:1] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[1:4] | No | Yes | No |
| mux_tree_size30_19_sram[0] | No | No | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | No | Yes | No |
| mux_tree_size30_1_sram[2] | No | No | No |
| mux_tree_size30_1_sram[0:1] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[3] | No | No | No |
| mux_tree_size30_3_sram[0:2] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[2:4] | No | Yes | No |
| mux_tree_size30_9_sram[1] | No | No | No |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram[0] | No | No | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 80 | 21.92 |
| Total Bits | 8576 | 4969 | 57.94 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2612 | 60.91 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 69 | 20.47 |
| Signal Bits | 1738 | 458 | 26.35 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 357 | 41.08 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[3] | No | No | No |
| mux_tree_size20_0_sram[0:2] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[2:4] | No | No | No |
| mux_tree_size20_10_sram[0:1] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[1:4] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[4] | No | No | No |
| mux_tree_size20_12_sram[0:3] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[0:3] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[2:4] | No | Yes | No |
| mux_tree_size20_14_sram[0:1] | No | No | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | Yes | No |
| mux_tree_size20_15_sram[1:3] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | No | No |
| mux_tree_size20_16_sram[0:3] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[2:4] | No | Yes | No |
| mux_tree_size20_1_sram[0:1] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[3] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[4] | No | No | No |
| mux_tree_size20_21_sram[0:3] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | Yes | No |
| mux_tree_size20_23_sram[3] | No | No | No |
| mux_tree_size20_23_sram[0:2] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[3:4] | No | Yes | No |
| mux_tree_size20_25_sram[1:2] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[1:4] | No | Yes | No |
| mux_tree_size20_28_sram[0] | No | No | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[1:4] | No | Yes | No |
| mux_tree_size20_29_sram[0] | No | No | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | Yes | No |
| mux_tree_size20_2_sram[2] | No | No | No |
| mux_tree_size20_2_sram[0:1] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | No | No |
| mux_tree_size20_3_sram[0:2] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | Yes | No |
| mux_tree_size20_4_sram[3] | No | No | No |
| mux_tree_size20_4_sram[0:2] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | No | Yes | No |
| mux_tree_size30_0_sram[0] | No | No | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | Yes | No |
| mux_tree_size30_12_sram[2] | No | No | No |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | No | Yes | No |
| mux_tree_size30_15_sram[2] | No | No | No |
| mux_tree_size30_15_sram[0:1] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | Yes | No |
| mux_tree_size30_17_sram[3] | No | No | No |
| mux_tree_size30_17_sram[0:2] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[2:4] | No | Yes | No |
| mux_tree_size30_1_sram[1] | No | No | No |
| mux_tree_size30_1_sram[0] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[3:4] | No | Yes | No |
| mux_tree_size30_23_sram[2] | No | No | No |
| mux_tree_size30_23_sram[0:1] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[2:3] | No | No | No |
| mux_tree_size30_26_sram[0:1] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | No | No |
| mux_tree_size30_27_sram[0:3] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[1:4] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[2:4] | No | Yes | No |
| mux_tree_size30_29_sram[1] | No | No | No |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[1:2] | No | Yes | No |
| mux_tree_size30_4_sram[0] | No | No | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | Yes | No |
| mux_tree_size30_8_sram[1] | No | No | No |
| mux_tree_size30_8_sram[0] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | Yes | No |
| mux_tree_size30_9_sram[3] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4976 | 58.02 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2619 | 61.08 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 67 | 19.88 |
| Signal Bits | 1738 | 465 | 26.75 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 364 | 41.89 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | Yes | No |
| mux_tree_size20_0_sram[1:2] | No | No | No |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | No | No | No |
| mux_tree_size20_10_sram[2:3] | No | Yes | No |
| mux_tree_size20_10_sram[1] | No | No | No |
| mux_tree_size20_10_sram[0] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[1:4] | No | Yes | No |
| mux_tree_size20_11_sram[0] | No | No | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | No | Yes | No |
| mux_tree_size20_12_sram[1:2] | No | No | No |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | No | No | No |
| mux_tree_size20_13_sram[0:2] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[3:4] | No | Yes | No |
| mux_tree_size20_14_sram[2] | No | No | No |
| mux_tree_size20_14_sram[0:1] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[3] | No | No | No |
| mux_tree_size20_18_sram[0:2] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[2] | No | No | No |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[1:4] | No | Yes | No |
| mux_tree_size20_25_sram[0] | No | No | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[2] | No | No | No |
| mux_tree_size20_27_sram[0:1] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | Yes | No |
| mux_tree_size20_4_sram[2] | No | No | No |
| mux_tree_size20_4_sram[0:1] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | No | No |
| mux_tree_size20_5_sram[2:3] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[3] | No | No | No |
| mux_tree_size20_7_sram[2] | No | Yes | No |
| mux_tree_size20_7_sram[1] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | Yes | No |
| mux_tree_size20_9_sram[3] | No | No | No |
| mux_tree_size20_9_sram[1:2] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[3:4] | No | Yes | No |
| mux_tree_size30_15_sram[2] | No | No | No |
| mux_tree_size30_15_sram[0:1] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | No | Yes | No |
| mux_tree_size30_18_sram[2] | No | No | No |
| mux_tree_size30_18_sram[0:1] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | No | No | No |
| mux_tree_size30_19_sram[1:2] | No | Yes | No |
| mux_tree_size30_19_sram[0] | No | No | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | No | No |
| mux_tree_size30_21_sram[0:3] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[3:4] | No | Yes | No |
| mux_tree_size30_22_sram[2] | No | No | No |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[2:4] | No | Yes | No |
| mux_tree_size30_23_sram[1] | No | No | No |
| mux_tree_size30_23_sram[0] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[0:4] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[2:4] | No | Yes | No |
| mux_tree_size30_29_sram[1] | No | No | No |
| mux_tree_size30_29_sram[0] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[0:3] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[3] | No | No | No |
| mux_tree_size30_3_sram[0:2] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[2:4] | No | Yes | No |
| mux_tree_size30_4_sram[1] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[3:4] | No | Yes | No |
| mux_tree_size30_6_sram[2] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | No | Yes | No |
| mux_tree_size30_9_sram[3] | No | No | No |
| mux_tree_size30_9_sram[0:2] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[1] | No | No | Yes |
| mux_tree_size4_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4970 | 57.95 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2612 | 60.91 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 457 | 26.29 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 356 | 40.97 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | No | No |
| mux_tree_size20_0_sram[3] | No | Yes | No |
| mux_tree_size20_0_sram[2] | No | No | No |
| mux_tree_size20_0_sram[0:1] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[4] | No | No | No |
| mux_tree_size20_11_sram[0:3] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[4] | No | No | No |
| mux_tree_size20_13_sram[2:3] | No | Yes | No |
| mux_tree_size20_13_sram[1] | No | No | No |
| mux_tree_size20_13_sram[0] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[3:4] | No | Yes | No |
| mux_tree_size20_16_sram[2] | No | No | No |
| mux_tree_size20_16_sram[1] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | No | No |
| mux_tree_size20_17_sram[0:2] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[1] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | Yes | No |
| mux_tree_size20_1_sram[3] | No | No | No |
| mux_tree_size20_1_sram[0:2] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | Yes | No |
| mux_tree_size20_20_sram[3] | No | No | No |
| mux_tree_size20_20_sram[0:2] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | No | No |
| mux_tree_size20_21_sram[0:2] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | No | Yes | No |
| mux_tree_size20_22_sram[2] | No | No | No |
| mux_tree_size20_22_sram[0:1] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | No | No |
| mux_tree_size20_23_sram[0:3] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | Yes | No |
| mux_tree_size20_24_sram[3] | No | No | No |
| mux_tree_size20_24_sram[0:2] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | Yes | No |
| mux_tree_size20_25_sram[0:1] | No | No | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[0:4] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[3:4] | No | Yes | No |
| mux_tree_size20_2_sram[1:2] | No | No | No |
| mux_tree_size20_2_sram[0] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[3] | No | Yes | No |
| mux_tree_size20_7_sram[2] | No | No | No |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[3] | No | No | No |
| mux_tree_size20_8_sram[0:2] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | Yes | No |
| mux_tree_size30_10_sram[2] | No | No | No |
| mux_tree_size30_10_sram[0:1] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[2:4] | No | Yes | No |
| mux_tree_size30_11_sram[1] | No | No | No |
| mux_tree_size30_11_sram[0] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[2:3] | No | No | No |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | No | No |
| mux_tree_size30_13_sram[0:2] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[3:4] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[0:4] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | No | Yes | No |
| mux_tree_size30_16_sram[1] | No | No | No |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | No | No |
| mux_tree_size30_22_sram[0:3] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | No | No | No |
| mux_tree_size30_24_sram[0:2] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[2:4] | No | Yes | No |
| mux_tree_size30_26_sram[0:1] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[3] | No | No | No |
| mux_tree_size30_4_sram[0:2] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | No | No |
| mux_tree_size30_6_sram[0:3] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | No |
| mux_tree_size30_7_sram[0:3] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[2:4] | No | Yes | No |
| mux_tree_size30_8_sram[0:1] | No | No | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[0] | No | No | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | No | No | Yes |
| mux_tree_size4_6_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 115 | 31.51 |
| Total Bits | 8576 | 5163 | 60.20 |
| Total Bits 0->1 | 4288 | 2478 | 57.79 |
| Total Bits 1->0 | 4288 | 2685 | 62.62 |
| Ports | 28 | 14 | 50.00 |
| Port Bits | 6838 | 4541 | 66.41 |
| Port Bits 0->1 | 3419 | 2262 | 66.16 |
| Port Bits 1->0 | 3419 | 2279 | 66.66 |
| Signals | 337 | 101 | 29.97 |
| Signal Bits | 1738 | 622 | 35.79 |
| Signal Bits 0->1 | 869 | 216 | 24.86 |
| Signal Bits 1->0 | 869 | 406 | 46.72 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[8] | No | Yes | No | INPUT |
| clb_I0[7] | No | No | No | INPUT |
| clb_I0[6] | Yes | Yes | Yes | INPUT |
| clb_I0[5] | No | Yes | No | INPUT |
| clb_I0[4] | No | No | No | INPUT |
| clb_I0[0:3] | No | Yes | No | INPUT |
| clb_I1[9] | No | Yes | No | INPUT |
| clb_I1[8] | No | No | No | INPUT |
| clb_I1[7] | No | Yes | No | INPUT |
| clb_I1[6] | No | No | No | INPUT |
| clb_I1[5] | No | Yes | No | INPUT |
| clb_I1[4] | No | No | No | INPUT |
| clb_I1[3] | No | Yes | No | INPUT |
| clb_I1[2] | Yes | Yes | Yes | INPUT |
| clb_I1[0:1] | No | No | No | INPUT |
| clb_I2[7:9] | No | Yes | No | INPUT |
| clb_I2[6] | No | No | No | INPUT |
| clb_I2[5] | Yes | Yes | Yes | INPUT |
| clb_I2[4] | No | Yes | No | INPUT |
| clb_I2[3] | No | No | No | INPUT |
| clb_I2[0:2] | No | Yes | No | INPUT |
| clb_I3[3:9] | No | No | No | INPUT |
| clb_I3[2] | No | Yes | No | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3] | No | No | No |
| mux_tree_size20_0_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[1] | No | No | No |
| mux_tree_size20_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[1:2] | No | Yes | No |
| mux_tree_size20_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[2:4] | No | Yes | No |
| mux_tree_size20_15_sram[1] | No | No | No |
| mux_tree_size20_15_sram[0] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[2:3] | No | Yes | No |
| mux_tree_size20_17_sram[1] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | Yes | No |
| mux_tree_size20_18_sram[1:3] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | No | Yes | No |
| mux_tree_size20_19_sram[1] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | No | No | No |
| mux_tree_size20_22_sram[0:3] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[1] | No | Yes | No |
| mux_tree_size20_24_sram[0] | No | No | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_25_sram[1] | No | No | Yes |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[4] | No | Yes | No |
| mux_tree_size20_26_sram[3] | No | No | No |
| mux_tree_size20_26_sram[0:2] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[1:3] | No | Yes | No |
| mux_tree_size20_27_sram[0] | No | No | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[1:2] | No | Yes | No |
| mux_tree_size20_28_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | No | No |
| mux_tree_size20_4_sram[0:2] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[4] | No | No | No |
| mux_tree_size20_5_sram[2:3] | No | Yes | No |
| mux_tree_size20_5_sram[1] | No | No | No |
| mux_tree_size20_5_sram[0] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1:2] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[2:4] | No | Yes | No |
| mux_tree_size20_8_sram[1] | No | No | No |
| mux_tree_size20_8_sram[0] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | Yes | No |
| mux_tree_size20_9_sram[3] | No | No | No |
| mux_tree_size20_9_sram[0:2] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | No | Yes |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[2] | No | No | Yes |
| mux_tree_size30_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[2] | No | No | No |
| mux_tree_size30_12_sram[1] | No | No | Yes |
| mux_tree_size30_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[3] | No | No | Yes |
| mux_tree_size30_13_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[0] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | No |
| mux_tree_size30_15_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1:2] | No | Yes | No |
| mux_tree_size30_15_sram[0] | No | No | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | No | Yes | No |
| mux_tree_size30_16_sram[1:3] | No | No | No |
| mux_tree_size30_16_sram[0] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | No | Yes |
| mux_tree_size30_17_sram[3] | No | No | No |
| mux_tree_size30_17_sram[2] | No | No | Yes |
| mux_tree_size30_17_sram[1] | No | No | No |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | Yes | No |
| mux_tree_size30_18_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[1:2] | No | Yes | No |
| mux_tree_size30_18_sram[0] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | Yes | No |
| mux_tree_size30_19_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[2] | No | Yes | No |
| mux_tree_size30_19_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[2] | No | Yes | No |
| mux_tree_size30_1_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[0] | No | No | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[3] | No | No | No |
| mux_tree_size30_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | Yes | No |
| mux_tree_size30_22_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[1:2] | No | Yes | No |
| mux_tree_size30_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | Yes | No |
| mux_tree_size30_24_sram[3] | No | No | No |
| mux_tree_size30_24_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[0:1] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | No | Yes |
| mux_tree_size30_25_sram[2:3] | No | Yes | No |
| mux_tree_size30_25_sram[1] | No | No | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[0] | No | No | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | Yes | No |
| mux_tree_size30_28_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0:1] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[3] | No | Yes | No |
| mux_tree_size30_29_sram[2] | No | No | No |
| mux_tree_size30_29_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[3:4] | No | Yes | No |
| mux_tree_size30_2_sram[1:2] | No | No | No |
| mux_tree_size30_2_sram[0] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[2:3] | No | No | Yes |
| mux_tree_size30_3_sram[1] | No | No | No |
| mux_tree_size30_3_sram[0] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[1] | No | Yes | No |
| mux_tree_size30_4_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | Yes | No |
| mux_tree_size30_7_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0:1] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[2] | No | Yes | No |
| mux_tree_size30_9_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[1] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[2] | No | No | Yes |
| mux_tree_size4_2_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | No | No | Yes |
| mux_tree_size4_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | No | Yes | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | Yes | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | Yes | Yes | Yes |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | No | Yes | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | Yes | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | Yes | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | Yes | No |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | Yes | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | Yes | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | Yes | No |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | Yes | No |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | Yes | No |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | Yes | No |
| mux_tree_size20_25_out | No | Yes | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | Yes | No |
| mux_tree_size20_27_out | No | Yes | No |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 117 | 32.05 |
| Total Bits | 8576 | 5236 | 61.05 |
| Total Bits 0->1 | 4288 | 2531 | 59.03 |
| Total Bits 1->0 | 4288 | 2705 | 63.08 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4571 | 66.85 |
| Port Bits 0->1 | 3419 | 2276 | 66.57 |
| Port Bits 1->0 | 3419 | 2295 | 67.12 |
| Signals | 337 | 105 | 31.16 |
| Signal Bits | 1738 | 665 | 38.26 |
| Signal Bits 0->1 | 869 | 255 | 29.34 |
| Signal Bits 1->0 | 869 | 410 | 47.18 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | Yes | Yes | Yes | INPUT |
| clb_I0[8] | No | Yes | No | INPUT |
| clb_I0[7] | No | No | No | INPUT |
| clb_I0[5:6] | No | Yes | No | INPUT |
| clb_I0[1:4] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | Yes | No | INPUT |
| clb_I1[9] | Yes | Yes | Yes | INPUT |
| clb_I1[5:8] | No | Yes | No | INPUT |
| clb_I1[4] | Yes | Yes | Yes | INPUT |
| clb_I1[3] | No | Yes | No | INPUT |
| clb_I1[0:2] | Yes | Yes | Yes | INPUT |
| clb_I2[8:9] | No | Yes | No | INPUT |
| clb_I2[7] | Yes | Yes | Yes | INPUT |
| clb_I2[6] | No | Yes | No | INPUT |
| clb_I2[5] | Yes | Yes | Yes | INPUT |
| clb_I2[4] | No | Yes | No | INPUT |
| clb_I2[3] | Yes | Yes | Yes | INPUT |
| clb_I2[1:2] | No | Yes | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[9] | Yes | Yes | Yes | INPUT |
| clb_I3[8] | No | Yes | No | INPUT |
| clb_I3[7] | Yes | Yes | Yes | INPUT |
| clb_I3[5:6] | No | Yes | No | INPUT |
| clb_I3[4] | Yes | Yes | Yes | INPUT |
| clb_I3[3] | No | Yes | No | INPUT |
| clb_I3[2] | Yes | Yes | Yes | INPUT |
| clb_I3[1] | No | Yes | No | INPUT |
| clb_I3[0] | Yes | Yes | Yes | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[4] | No | Yes | No |
| mux_tree_size20_0_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:1] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[2:4] | No | Yes | No |
| mux_tree_size20_11_sram[1] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[2] | No | No | No |
| mux_tree_size20_12_sram[1] | No | Yes | No |
| mux_tree_size20_12_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | No | No | Yes |
| mux_tree_size20_15_sram[3] | No | No | No |
| mux_tree_size20_15_sram[0:2] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | Yes | No |
| mux_tree_size20_16_sram[3] | No | No | No |
| mux_tree_size20_16_sram[1:2] | No | Yes | No |
| mux_tree_size20_16_sram[0] | No | No | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[1:2] | No | No | No |
| mux_tree_size20_17_sram[0] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | No | Yes |
| mux_tree_size20_18_sram[3] | No | Yes | No |
| mux_tree_size20_18_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[3] | No | No | No |
| mux_tree_size20_19_sram[1:2] | No | Yes | No |
| mux_tree_size20_19_sram[0] | No | No | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[3:4] | No | Yes | No |
| mux_tree_size20_20_sram[1:2] | No | No | No |
| mux_tree_size20_20_sram[0] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | Yes | No |
| mux_tree_size20_24_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | No | Yes | No |
| mux_tree_size20_25_sram[1:3] | No | No | No |
| mux_tree_size20_25_sram[0] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[1:4] | No | Yes | No |
| mux_tree_size20_26_sram[0] | No | No | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[1] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | Yes | No |
| mux_tree_size20_28_sram[3] | No | No | No |
| mux_tree_size20_28_sram[0:2] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | No | No |
| mux_tree_size20_29_sram[0:3] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[2] | No | No | Yes |
| mux_tree_size20_3_sram[1] | No | Yes | No |
| mux_tree_size20_3_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | No | Yes | No |
| mux_tree_size20_4_sram[2] | No | No | No |
| mux_tree_size20_4_sram[0:1] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[0] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[3:4] | No | Yes | No |
| mux_tree_size20_8_sram[2] | No | No | No |
| mux_tree_size20_8_sram[0:1] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | No | No |
| mux_tree_size20_9_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[2] | No | Yes | No |
| mux_tree_size20_9_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[0] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[3] | No | Yes | No |
| mux_tree_size30_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | No | Yes | No |
| mux_tree_size30_10_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1] | No | No | Yes |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | No | Yes |
| mux_tree_size30_11_sram[1] | No | Yes | No |
| mux_tree_size30_11_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | No | No |
| mux_tree_size30_12_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_12_sram[0] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | Yes | No |
| mux_tree_size30_13_sram[2:3] | No | No | Yes |
| mux_tree_size30_13_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[1] | No | Yes | No |
| mux_tree_size30_14_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[0:3] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | No | Yes | No |
| mux_tree_size30_18_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[1] | No | Yes | No |
| mux_tree_size30_18_sram[0] | No | No | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[2] | No | No | Yes |
| mux_tree_size30_19_sram[1] | No | No | No |
| mux_tree_size30_19_sram[0] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[2] | No | Yes | No |
| mux_tree_size30_1_sram[1] | No | No | Yes |
| mux_tree_size30_1_sram[0] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[0:1] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[3] | No | Yes | No |
| mux_tree_size30_21_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0:1] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[2] | No | Yes | No |
| mux_tree_size30_22_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | Yes | No |
| mux_tree_size30_23_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[1] | No | Yes | No |
| mux_tree_size30_23_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:3] | No | No | Yes |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[1:3] | No | Yes | No |
| mux_tree_size30_25_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[1:2] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | Yes |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | Yes | No |
| mux_tree_size30_27_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[3] | No | Yes | No |
| mux_tree_size30_28_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0:1] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram[2:3] | No | Yes | No |
| mux_tree_size30_29_sram[1] | No | No | Yes |
| mux_tree_size30_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[2:4] | No | No | No |
| mux_tree_size30_2_sram[0:1] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0:1] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[2:3] | No | Yes | No |
| mux_tree_size30_4_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[0] | No | No | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_5_sram[0] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | No | Yes |
| mux_tree_size30_6_sram[3] | No | No | No |
| mux_tree_size30_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[1] | No | Yes | No |
| mux_tree_size30_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[0:2] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[3] | No | Yes | No |
| mux_tree_size30_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[0] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[2] | No | Yes | No |
| mux_tree_size30_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[2] | No | No | Yes |
| mux_tree_size4_5_sram[1] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[0] | No | No | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | No | Yes | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | Yes | Yes | Yes |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | No | Yes | No |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | No | Yes | No |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | No | Yes | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | No | Yes | No |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | No | Yes | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | No | Yes | No |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | No | Yes | No |
| mux_tree_size20_18_out | Yes | Yes | Yes |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | Yes | No |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | Yes | No |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | Yes | No |
| mux_tree_size30_25_out | No | Yes | No |
| mux_tree_size30_26_out | No | Yes | No |
| mux_tree_size20_24_out | No | Yes | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | Yes | No |
| mux_tree_size30_29_out | No | Yes | No |
| mux_tree_size20_27_out | No | Yes | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 78 | 21.37 |
| Total Bits | 8576 | 4966 | 57.91 |
| Total Bits 0->1 | 4288 | 2358 | 54.99 |
| Total Bits 1->0 | 4288 | 2608 | 60.82 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4513 | 66.00 |
| Port Bits 0->1 | 3419 | 2257 | 66.01 |
| Port Bits 1->0 | 3419 | 2256 | 65.98 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 453 | 26.06 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 352 | 40.51 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[1:2] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | No | No |
| mux_tree_size20_15_sram[0:2] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | No | No |
| mux_tree_size20_17_sram[1:2] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[1] | No | No | No |
| mux_tree_size20_18_sram[0] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[1:3] | No | No | No |
| mux_tree_size20_19_sram[0] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | No | No |
| mux_tree_size20_20_sram[0:3] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[0:4] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | No | Yes | No |
| mux_tree_size20_26_sram[0:2] | No | No | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | No | Yes | No |
| mux_tree_size20_27_sram[1:2] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | No | Yes | No |
| mux_tree_size20_28_sram[2] | No | No | No |
| mux_tree_size20_28_sram[0:1] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[3:4] | No | Yes | No |
| mux_tree_size20_29_sram[2] | No | No | No |
| mux_tree_size20_29_sram[0:1] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[0:4] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[0:4] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[3:4] | No | Yes | No |
| mux_tree_size30_10_sram[1:2] | No | No | No |
| mux_tree_size30_10_sram[0] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[2:4] | No | Yes | No |
| mux_tree_size30_12_sram[1] | No | No | No |
| mux_tree_size30_12_sram[0] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | No | Yes | No |
| mux_tree_size30_13_sram[2] | No | No | No |
| mux_tree_size30_13_sram[0:1] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | No |
| mux_tree_size30_15_sram[0:3] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[3:4] | No | Yes | No |
| mux_tree_size30_17_sram[0:2] | No | No | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | No | No | No |
| mux_tree_size30_18_sram[0:2] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[2:4] | No | Yes | No |
| mux_tree_size30_19_sram[0:1] | No | No | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[2:3] | No | No | No |
| mux_tree_size30_20_sram[0:1] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[2:4] | No | No | No |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[1:4] | No | Yes | No |
| mux_tree_size30_24_sram[0] | No | No | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[0:4] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[0:4] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | No | No | No |
| mux_tree_size30_27_sram[0:3] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[1:4] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[1:4] | No | Yes | No |
| mux_tree_size30_29_sram[0] | No | No | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[1:3] | No | Yes | No |
| mux_tree_size30_2_sram[0] | No | No | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[4] | No | Yes | No |
| mux_tree_size30_3_sram[3] | No | No | No |
| mux_tree_size30_3_sram[0:2] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[1:4] | No | Yes | No |
| mux_tree_size30_7_sram[0] | No | No | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[3:4] | No | Yes | No |
| mux_tree_size30_8_sram[2] | No | No | No |
| mux_tree_size30_8_sram[0:1] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[1:4] | No | Yes | No |
| mux_tree_size30_9_sram[0] | No | No | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | No | No | Yes |
| mux_tree_size4_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 109 | 29.86 |
| Total Bits | 8576 | 5116 | 59.65 |
| Total Bits 0->1 | 4288 | 2465 | 57.49 |
| Total Bits 1->0 | 4288 | 2651 | 61.82 |
| Ports | 28 | 12 | 42.86 |
| Port Bits | 6838 | 4548 | 66.51 |
| Port Bits 0->1 | 3419 | 2272 | 66.45 |
| Port Bits 1->0 | 3419 | 2276 | 66.57 |
| Signals | 337 | 97 | 28.78 |
| Signal Bits | 1738 | 568 | 32.68 |
| Signal Bits 0->1 | 869 | 193 | 22.21 |
| Signal Bits 1->0 | 869 | 375 | 43.15 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | No | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[7] | No | Yes | No | INPUT |
| clb_I0[5:6] | Yes | Yes | Yes | INPUT |
| clb_I0[4] | No | No | No | INPUT |
| clb_I0[3] | No | Yes | No | INPUT |
| clb_I0[2] | No | No | No | INPUT |
| clb_I0[1] | Yes | Yes | Yes | INPUT |
| clb_I0[0] | No | No | No | INPUT |
| clb_I1[9] | No | No | No | INPUT |
| clb_I1[7:8] | Yes | Yes | Yes | INPUT |
| clb_I1[6] | No | No | No | INPUT |
| clb_I1[5] | Yes | Yes | Yes | INPUT |
| clb_I1[4] | No | No | No | INPUT |
| clb_I1[3] | Yes | Yes | Yes | INPUT |
| clb_I1[2] | No | No | No | INPUT |
| clb_I1[1] | Yes | Yes | Yes | INPUT |
| clb_I1[0] | No | No | No | INPUT |
| clb_I2[9] | No | No | No | INPUT |
| clb_I2[7:8] | Yes | Yes | Yes | INPUT |
| clb_I2[6] | No | Yes | No | INPUT |
| clb_I2[5] | Yes | Yes | Yes | INPUT |
| clb_I2[3:4] | No | Yes | No | INPUT |
| clb_I2[2] | Yes | Yes | Yes | INPUT |
| clb_I2[1] | No | No | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[4:9] | No | No | No | INPUT |
| clb_I3[3] | Yes | Yes | Yes | INPUT |
| clb_I3[0:2] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[3:4] | No | No | No |
| mux_tree_size20_0_sram[1:2] | No | Yes | No |
| mux_tree_size20_0_sram[0] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[3:4] | No | Yes | No |
| mux_tree_size20_10_sram[2] | No | No | No |
| mux_tree_size20_10_sram[0:1] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram[0] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[0:2] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[4] | No | Yes | No |
| mux_tree_size20_16_sram[3] | No | No | No |
| mux_tree_size20_16_sram[0:2] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[2:4] | No | Yes | No |
| mux_tree_size20_17_sram[0:1] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[2:4] | No | Yes | No |
| mux_tree_size20_18_sram[0:1] | No | No | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | No | No |
| mux_tree_size20_1_sram[2:3] | No | Yes | No |
| mux_tree_size20_1_sram[0:1] | No | No | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[1:4] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[1:4] | No | Yes | No |
| mux_tree_size20_22_sram[0] | No | No | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[2] | No | No | No |
| mux_tree_size20_23_sram[0:1] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[3:4] | No | No | No |
| mux_tree_size20_24_sram[0:2] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[1:4] | No | Yes | No |
| mux_tree_size20_25_sram[0] | No | No | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[2] | No | Yes | No |
| mux_tree_size20_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | Yes | No |
| mux_tree_size20_28_sram[3] | No | No | No |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[1] | No | No | No |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[2:4] | No | Yes | No |
| mux_tree_size20_3_sram[0:1] | No | No | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[3] | No | No | Yes |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[3:4] | No | Yes | No |
| mux_tree_size20_5_sram[2] | No | No | No |
| mux_tree_size20_5_sram[1] | No | Yes | No |
| mux_tree_size20_5_sram[0] | No | No | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | No | No | Yes |
| mux_tree_size20_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[2:3] | No | Yes | No |
| mux_tree_size20_7_sram[1] | No | No | No |
| mux_tree_size20_7_sram[0] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[3:4] | No | Yes | No |
| mux_tree_size20_8_sram[2] | No | No | No |
| mux_tree_size20_8_sram[0:1] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[1:4] | No | Yes | No |
| mux_tree_size20_9_sram[0] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[2:4] | No | Yes | No |
| mux_tree_size30_0_sram[1] | No | No | No |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[3] | No | Yes | No |
| mux_tree_size30_10_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[0] | No | No | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[1:4] | No | Yes | No |
| mux_tree_size30_11_sram[0] | No | No | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[1:4] | No | Yes | No |
| mux_tree_size30_13_sram[0] | No | No | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | No | Yes | No |
| mux_tree_size30_14_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[1] | No | Yes | No |
| mux_tree_size30_15_sram[0] | No | No | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[3:4] | No | Yes | No |
| mux_tree_size30_16_sram[2] | No | No | No |
| mux_tree_size30_16_sram[0:1] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[2:3] | No | Yes | No |
| mux_tree_size30_18_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[0] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[1:3] | No | Yes | No |
| mux_tree_size30_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[2:3] | No | No | No |
| mux_tree_size30_1_sram[0:1] | No | No | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | Yes | No |
| mux_tree_size30_20_sram[2:3] | No | No | No |
| mux_tree_size30_20_sram[0:1] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[3] | No | No | Yes |
| mux_tree_size30_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[0] | No | Yes | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | No | No | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[1] | No | Yes | No |
| mux_tree_size30_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[2] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | No | No | No |
| mux_tree_size30_25_sram[0:2] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | No | Yes |
| mux_tree_size30_26_sram[2:3] | No | Yes | No |
| mux_tree_size30_26_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[0] | No | Yes | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[0] | No | No | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[1:4] | No | Yes | No |
| mux_tree_size30_28_sram[0] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | No |
| mux_tree_size30_29_sram[3] | No | Yes | No |
| mux_tree_size30_29_sram[2] | No | No | No |
| mux_tree_size30_29_sram[0:1] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | No | No | No |
| mux_tree_size30_2_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[0] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[1] | No | Yes | No |
| mux_tree_size30_4_sram[0] | No | No | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[1:4] | No | Yes | No |
| mux_tree_size30_7_sram[0] | No | No | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | Yes |
| mux_tree_size30_8_sram[0:3] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[1:2] | No | Yes | No |
| mux_tree_size30_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[1] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram[1] | No | No | Yes |
| mux_tree_size4_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[1:2] | No | No | Yes |
| mux_tree_size4_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[2] | No | No | Yes |
| mux_tree_size4_3_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[2] | No | No | Yes |
| mux_tree_size4_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram[0] | No | No | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | Yes | No |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | Yes | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | No | Yes | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | Yes | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | Yes | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 77 | 21.10 |
| Total Bits | 8576 | 4969 | 57.94 |
| Total Bits 0->1 | 4288 | 2357 | 54.97 |
| Total Bits 1->0 | 4288 | 2612 | 60.91 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4511 | 65.97 |
| Port Bits 0->1 | 3419 | 2256 | 65.98 |
| Port Bits 1->0 | 3419 | 2255 | 65.95 |
| Signals | 337 | 66 | 19.58 |
| Signal Bits | 1738 | 458 | 26.35 |
| Signal Bits 0->1 | 869 | 101 | 11.62 |
| Signal Bits 1->0 | 869 | 357 | 41.08 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | No | No | No | INPUT |
| clb_I1[0:9] | No | No | No | INPUT |
| clb_I2[0:9] | No | No | No | INPUT |
| clb_I3[0:9] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[1:4] | No | Yes | No |
| mux_tree_size20_10_sram[0] | No | No | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[3:4] | No | Yes | No |
| mux_tree_size20_11_sram[1:2] | No | No | No |
| mux_tree_size20_11_sram[0] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | No | Yes | No |
| mux_tree_size20_17_sram[2] | No | No | No |
| mux_tree_size20_17_sram[1] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | No | No | No |
| mux_tree_size20_18_sram[0:3] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | Yes | No |
| mux_tree_size20_19_sram[3] | No | No | No |
| mux_tree_size20_19_sram[0:2] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[0:4] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[3:4] | No | Yes | No |
| mux_tree_size20_23_sram[2] | No | No | No |
| mux_tree_size20_23_sram[0:1] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[4] | No | No | No |
| mux_tree_size20_24_sram[0:3] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[4] | No | Yes | No |
| mux_tree_size20_26_sram[3] | No | No | No |
| mux_tree_size20_26_sram[1:2] | No | Yes | No |
| mux_tree_size20_26_sram[0] | No | No | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[2:4] | No | Yes | No |
| mux_tree_size20_27_sram[1] | No | No | No |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[4] | No | Yes | No |
| mux_tree_size20_28_sram[3] | No | No | No |
| mux_tree_size20_28_sram[0:2] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[0:4] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[0:4] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | Yes | No |
| mux_tree_size20_4_sram[2:3] | No | No | No |
| mux_tree_size20_4_sram[0:1] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | No | Yes | No |
| mux_tree_size20_7_sram[2] | No | No | No |
| mux_tree_size20_7_sram[0:1] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[2:3] | No | No | No |
| mux_tree_size20_8_sram[0:1] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[4] | No | No | No |
| mux_tree_size20_9_sram[0:3] | No | Yes | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[1:4] | No | Yes | No |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[3:4] | No | Yes | No |
| mux_tree_size30_11_sram[2] | No | No | No |
| mux_tree_size30_11_sram[0:1] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[3:4] | No | No | No |
| mux_tree_size30_12_sram[0:2] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[0:4] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | No | No | No |
| mux_tree_size30_15_sram[0:3] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | No | Yes | No |
| mux_tree_size30_17_sram[1] | No | No | No |
| mux_tree_size30_17_sram[0] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[0:4] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[4] | No | No | No |
| mux_tree_size30_19_sram[0:3] | No | Yes | No |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | No | No | No |
| mux_tree_size30_20_sram[0:3] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | No | Yes | No |
| mux_tree_size30_21_sram[0:1] | No | No | No |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[3:4] | No | Yes | No |
| mux_tree_size30_22_sram[2] | No | No | No |
| mux_tree_size30_22_sram[0:1] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[0:4] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | No | No | No |
| mux_tree_size30_24_sram[2:3] | No | Yes | No |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | No | Yes | No |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[2:4] | No | Yes | No |
| mux_tree_size30_25_sram[1] | No | No | No |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[3] | No | No | No |
| mux_tree_size30_26_sram[1:2] | No | Yes | No |
| mux_tree_size30_26_sram[0] | No | No | No |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | No | Yes | No |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | Yes | No |
| mux_tree_size30_28_sram[3] | No | No | No |
| mux_tree_size30_28_sram[0:2] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | No | Yes | No |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[3:4] | No | Yes | No |
| mux_tree_size30_2_sram[2] | No | No | No |
| mux_tree_size30_2_sram[0:1] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[2:4] | No | Yes | No |
| mux_tree_size30_4_sram[1] | No | No | No |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | No | Yes | No |
| mux_tree_size30_6_sram[2:3] | No | No | No |
| mux_tree_size30_6_sram[0:1] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | No | Yes | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram[1] | No | No | Yes |
| mux_tree_size4_0_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[0:1] | No | No | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | No | No | Yes |
| mux_tree_size4_8_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | No | No | No |
| mux_tree_size30_19_out | No | No | No |
| mux_tree_size30_20_out | No | No | No |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | No | No | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | No | No | No |
| mux_tree_size30_22_out | No | No | No |
| mux_tree_size30_23_out | No | No | No |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | No | No | No |
| mux_tree_size30_25_out | No | No | No |
| mux_tree_size30_26_out | No | No | No |
| mux_tree_size20_24_out | No | No | No |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | No | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | No | No | No |
| mux_tree_size20_27_out | No | No | No |
| mux_tree_size20_28_out | No | No | No |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 96 | 26.30 |
| Total Bits | 8576 | 5087 | 59.32 |
| Total Bits 0->1 | 4288 | 2449 | 57.11 |
| Total Bits 1->0 | 4288 | 2638 | 61.52 |
| Ports | 28 | 11 | 39.29 |
| Port Bits | 6838 | 4534 | 66.31 |
| Port Bits 0->1 | 3419 | 2265 | 66.25 |
| Port Bits 1->0 | 3419 | 2269 | 66.36 |
| Signals | 337 | 85 | 25.22 |
| Signal Bits | 1738 | 553 | 31.82 |
| Signal Bits 0->1 | 869 | 184 | 21.17 |
| Signal Bits 1->0 | 869 | 369 | 42.46 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[9] | No | Yes | No | INPUT |
| clb_I0[8] | Yes | Yes | Yes | INPUT |
| clb_I0[5:7] | No | No | No | INPUT |
| clb_I0[4] | Yes | Yes | Yes | INPUT |
| clb_I0[3] | No | No | No | INPUT |
| clb_I0[2] | Yes | Yes | Yes | INPUT |
| clb_I0[1] | No | No | No | INPUT |
| clb_I0[0] | No | Yes | No | INPUT |
| clb_I1[9] | No | Yes | No | INPUT |
| clb_I1[7:8] | No | No | No | INPUT |
| clb_I1[6] | Yes | Yes | Yes | INPUT |
| clb_I1[5] | No | No | No | INPUT |
| clb_I1[3:4] | Yes | Yes | Yes | INPUT |
| clb_I1[0:2] | No | No | No | INPUT |
| clb_I2[5:9] | No | No | No | INPUT |
| clb_I2[3:4] | Yes | Yes | Yes | INPUT |
| clb_I2[1:2] | No | No | No | INPUT |
| clb_I2[0] | Yes | Yes | Yes | INPUT |
| clb_I3[6:9] | No | No | No | INPUT |
| clb_I3[5] | No | Yes | No | INPUT |
| clb_I3[3:4] | No | No | No | INPUT |
| clb_I3[2] | No | Yes | No | INPUT |
| clb_I3[0:1] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | No | No | No | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[2:4] | No | Yes | No |
| mux_tree_size20_0_sram[0:1] | No | No | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | No | Yes | No |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[0:4] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[0:4] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[4] | No | No | No |
| mux_tree_size20_17_sram[0:3] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[0:4] | No | Yes | No |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[4] | No | No | Yes |
| mux_tree_size20_19_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[2] | No | Yes | No |
| mux_tree_size20_19_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | No | Yes | No |
| mux_tree_size20_1_sram[3] | No | No | No |
| mux_tree_size20_1_sram[0:2] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[1:4] | No | Yes | No |
| mux_tree_size20_20_sram[0] | No | No | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[1:4] | No | Yes | No |
| mux_tree_size20_21_sram[0] | No | No | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[2] | No | Yes | No |
| mux_tree_size20_22_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_25_sram[3] | No | No | Yes |
| mux_tree_size20_25_sram[2] | No | Yes | No |
| mux_tree_size20_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[4] | No | Yes | No |
| mux_tree_size20_29_sram[2:3] | No | No | No |
| mux_tree_size20_29_sram[0:1] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | No | No |
| mux_tree_size20_2_sram[0:3] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | No | No | No |
| mux_tree_size20_3_sram[0:3] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | No |
| mux_tree_size20_4_sram[2:3] | No | Yes | No |
| mux_tree_size20_4_sram[0:1] | No | No | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[3:4] | No | Yes | No |
| mux_tree_size20_5_sram[0:2] | No | No | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[0:4] | No | Yes | No |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | No | No |
| mux_tree_size20_7_sram[0:3] | No | Yes | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[0:4] | No | No | No |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[0:4] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | No | Yes | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[0:4] | No | Yes | No |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[4] | No | Yes | No |
| mux_tree_size30_12_sram[2:3] | No | No | No |
| mux_tree_size30_12_sram[0:1] | No | Yes | No |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[0:4] | No | Yes | No |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[1:4] | No | Yes | No |
| mux_tree_size30_14_sram[0] | No | No | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[2:4] | No | Yes | No |
| mux_tree_size30_15_sram[1] | No | No | No |
| mux_tree_size30_15_sram[0] | No | Yes | No |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[0:4] | No | Yes | No |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[4] | No | No | No |
| mux_tree_size30_17_sram[0:3] | No | Yes | No |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[1] | No | Yes | No |
| mux_tree_size30_18_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[1:2] | No | Yes | No |
| mux_tree_size30_19_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[0:4] | No | Yes | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[2:3] | No | Yes | No |
| mux_tree_size30_20_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_20_sram[0] | No | Yes | No |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram[1] | No | Yes | No |
| mux_tree_size30_21_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[3] | No | Yes | No |
| mux_tree_size30_22_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[1] | No | Yes | No |
| mux_tree_size30_22_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[3] | No | Yes | No |
| mux_tree_size30_23_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[0] | No | No | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1:3] | No | No | Yes |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[2] | No | Yes | No |
| mux_tree_size30_25_sram[0:1] | No | No | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[2:3] | No | No | Yes |
| mux_tree_size30_26_sram[1] | No | Yes | No |
| mux_tree_size30_26_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[3] | No | Yes | No |
| mux_tree_size30_27_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | No | No | No |
| mux_tree_size30_28_sram[2:3] | No | Yes | No |
| mux_tree_size30_28_sram[0:1] | No | No | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | Yes |
| mux_tree_size30_29_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[0:4] | No | Yes | No |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[3:4] | No | Yes | No |
| mux_tree_size30_3_sram[2] | No | No | No |
| mux_tree_size30_3_sram[0:1] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[4] | No | No | No |
| mux_tree_size30_5_sram[1:3] | No | Yes | No |
| mux_tree_size30_5_sram[0] | No | No | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[0:4] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | No | No | No |
| mux_tree_size30_7_sram[2:3] | No | Yes | No |
| mux_tree_size30_7_sram[1] | No | No | No |
| mux_tree_size30_7_sram[0] | No | Yes | No |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[1:4] | No | Yes | No |
| mux_tree_size30_8_sram[0] | No | No | No |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[3:4] | No | Yes | No |
| mux_tree_size30_9_sram[2] | No | No | No |
| mux_tree_size30_9_sram[0:1] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | No | No |
| mux_tree_size30_1_out | No | No | No |
| mux_tree_size30_2_out | No | No | No |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | No | No |
| mux_tree_size30_4_out | No | No | No |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | No | No | No |
| mux_tree_size20_4_out | No | No | No |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | No | No | No |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | No | No | No |
| mux_tree_size30_7_out | No | No | No |
| mux_tree_size30_8_out | No | No | No |
| mux_tree_size20_6_out | No | No | No |
| mux_tree_size20_7_out | No | No | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | No | No | No |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | No | No |
| mux_tree_size30_10_out | No | No | No |
| mux_tree_size30_11_out | No | No | No |
| mux_tree_size20_9_out | No | No | No |
| mux_tree_size20_10_out | No | No | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | No | No | No |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | No | No | No |
| mux_tree_size30_13_out | No | No | No |
| mux_tree_size30_14_out | No | No | No |
| mux_tree_size20_12_out | No | No | No |
| mux_tree_size20_13_out | No | No | No |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | No | No | No |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | No | No | No |
| mux_tree_size30_16_out | No | No | No |
| mux_tree_size30_17_out | No | No | No |
| mux_tree_size20_15_out | No | No | No |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | No | No | No |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | No | No | No |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | No | No | No |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | No | No | No |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | No | No | No |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | Yes | Yes | Yes |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | No | No | No |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | No | Yes | No |
| mux_tree_size30_28_out | No | No | No |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | No | No | No |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | No | No | No |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 199 | 54.52 |
| Total Bits | 8576 | 5488 | 63.99 |
| Total Bits 0->1 | 4288 | 2734 | 63.76 |
| Total Bits 1->0 | 4288 | 2754 | 64.23 |
| Ports | 28 | 18 | 64.29 |
| Port Bits | 6838 | 4592 | 67.15 |
| Port Bits 0->1 | 3419 | 2296 | 67.15 |
| Port Bits 1->0 | 3419 | 2296 | 67.15 |
| Signals | 337 | 181 | 53.71 |
| Signal Bits | 1738 | 896 | 51.55 |
| Signal Bits 0->1 | 869 | 438 | 50.40 |
| Signal Bits 1->0 | 869 | 458 | 52.70 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[0:9] | Yes | Yes | Yes | INPUT |
| clb_I1[0:9] | Yes | Yes | Yes | INPUT |
| clb_I2[0:9] | Yes | Yes | Yes | INPUT |
| clb_I3[7:9] | No | No | No | INPUT |
| clb_I3[1:6] | Yes | Yes | Yes | INPUT |
| clb_I3[0] | No | Yes | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | Yes | Yes | Yes | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | Yes | Yes | Yes | INPUT |
| clb_lreset | Yes | Yes | Yes | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | No | No | No | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0] | No | No | Yes |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram[0:3] | No | Yes | No |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[2] | No | No | Yes |
| mux_tree_size20_13_sram[0:1] | No | Yes | No |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[3] | No | No | Yes |
| mux_tree_size20_15_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_16_sram[1] | No | Yes | No |
| mux_tree_size20_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_17_sram[1:2] | No | Yes | No |
| mux_tree_size20_17_sram[0] | No | No | Yes |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[2:3] | No | No | Yes |
| mux_tree_size20_18_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_1_sram[3] | No | No | No |
| mux_tree_size20_1_sram[2] | No | No | Yes |
| mux_tree_size20_1_sram[0:1] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[4] | No | No | Yes |
| mux_tree_size20_20_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_20_sram[1:2] | No | Yes | No |
| mux_tree_size20_20_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_22_sram[0:3] | No | No | Yes |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[4] | No | No | Yes |
| mux_tree_size20_23_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_23_sram[1:2] | No | Yes | No |
| mux_tree_size20_23_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[0] | No | No | Yes |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[2:4] | No | No | Yes |
| mux_tree_size20_25_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_26_sram[1:2] | No | Yes | No |
| mux_tree_size20_26_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | No | Yes |
| mux_tree_size20_27_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_29_sram[1] | No | No | Yes |
| mux_tree_size20_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[2:4] | No | Yes | No |
| mux_tree_size20_2_sram[1] | No | No | No |
| mux_tree_size20_2_sram[0] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[3] | No | No | Yes |
| mux_tree_size20_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[2] | No | Yes | No |
| mux_tree_size20_4_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1] | No | Yes | No |
| mux_tree_size20_6_sram[0] | No | No | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[1:2] | No | No | Yes |
| mux_tree_size20_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[4] | No | Yes | No |
| mux_tree_size20_8_sram[2:3] | No | No | No |
| mux_tree_size20_8_sram[0:1] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[3:4] | No | No | Yes |
| mux_tree_size20_9_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[0] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_11_sram[2] | No | No | Yes |
| mux_tree_size30_11_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[4] | No | No | Yes |
| mux_tree_size30_13_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | No | Yes |
| mux_tree_size30_14_sram[2] | No | No | No |
| mux_tree_size30_14_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[0] | No | No | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[1] | No | No | Yes |
| mux_tree_size30_16_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[2] | No | Yes | No |
| mux_tree_size30_18_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[3] | No | Yes | No |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[1] | No | Yes | No |
| mux_tree_size30_1_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[0] | No | No | Yes |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[2] | No | No | Yes |
| mux_tree_size30_24_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[3] | No | No | Yes |
| mux_tree_size30_25_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[2] | No | Yes | No |
| mux_tree_size30_26_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[2:3] | No | No | Yes |
| mux_tree_size30_2_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[0:4] | No | Yes | No |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[0] | No | Yes | No |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[0] | No | No | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[2] | No | No | Yes |
| mux_tree_size4_9_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | Yes | Yes | Yes |
| set | Yes | Yes | Yes |
| rst | Yes | Yes | Yes |
| clb_lreset_b | Yes | Yes | Yes |
| clb_lreset_q | Yes | Yes | Yes |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | Yes | Yes | Yes |
| mux_tree_size20_1_out | No | Yes | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | Yes | Yes | Yes |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | No | No | No |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | No | Yes | No |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | No | No | No |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | No | No | No |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | No | Yes | No |
| mux_tree_size20_7_out | Yes | Yes | Yes |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | No | No | No |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | No | Yes | No |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | Yes | Yes | Yes |
| mux_tree_size20_10_out | Yes | Yes | Yes |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | No | No | No |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | Yes | Yes | Yes |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | No | No | No |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | Yes | Yes | Yes |
| mux_tree_size20_17_out | Yes | Yes | Yes |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | No | No | No |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | Yes | Yes | Yes |
| mux_tree_size20_19_out | Yes | Yes | Yes |
| mux_tree_size20_20_out | Yes | Yes | Yes |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | No | No | No |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | Yes | Yes | Yes |
| mux_tree_size20_23_out | Yes | Yes | Yes |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | No | No | No |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | Yes | Yes | Yes |
| mux_tree_size20_26_out | Yes | Yes | Yes |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | No | No | No |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | Yes | Yes | Yes |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | No | No | No |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | Yes | Yes | Yes |
| direct_interc_25_out | Yes | Yes | Yes |
| direct_interc_32_out | Yes | Yes | Yes |
| direct_interc_33_out | Yes | Yes | Yes |
| direct_interc_40_out | Yes | Yes | Yes |
| direct_interc_41_out | Yes | Yes | Yes |
| direct_interc_48_out | Yes | Yes | Yes |
| direct_interc_49_out | Yes | Yes | Yes |
| direct_interc_56_out | Yes | Yes | Yes |
| direct_interc_57_out | Yes | Yes | Yes |
| direct_interc_64_out | Yes | Yes | Yes |
| direct_interc_65_out | Yes | Yes | Yes |
| direct_interc_72_out | Yes | Yes | Yes |
| direct_interc_73_out | Yes | Yes | Yes |
| direct_interc_80_out | Yes | Yes | Yes |
| direct_interc_81_out | Yes | Yes | Yes |
| direct_interc_88_out | Yes | Yes | Yes |
| direct_interc_89_out | Yes | Yes | Yes |
| direct_interc_96_out | Yes | Yes | Yes |
| direct_interc_97_out | Yes | Yes | Yes |
| Total | Covered | Percent | |
|---|---|---|---|
| Totals | 365 | 153 | 41.92 |
| Total Bits | 8576 | 5344 | 62.31 |
| Total Bits 0->1 | 4288 | 2615 | 60.98 |
| Total Bits 1->0 | 4288 | 2729 | 63.64 |
| Ports | 28 | 15 | 53.57 |
| Port Bits | 6838 | 4591 | 67.14 |
| Port Bits 0->1 | 3419 | 2295 | 67.12 |
| Port Bits 1->0 | 3419 | 2296 | 67.15 |
| Signals | 337 | 138 | 40.95 |
| Signal Bits | 1738 | 753 | 43.33 |
| Signal Bits 0->1 | 869 | 320 | 36.82 |
| Signal Bits 1->0 | 869 | 433 | 49.83 |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 | Direction |
| prst | Yes | Yes | Yes | INPUT |
| CFG_DONE | Yes | Yes | Yes | INPUT |
| test_en | No | No | No | INPUT |
| scan_mode | No | No | No | INPUT |
| scan_clk | Yes | Yes | Yes | INPUT |
| clb_I0[8:9] | Yes | Yes | Yes | INPUT |
| clb_I0[7] | No | Yes | No | INPUT |
| clb_I0[0:6] | Yes | Yes | Yes | INPUT |
| clb_I1[0:9] | Yes | Yes | Yes | INPUT |
| clb_I2[0:9] | Yes | Yes | Yes | INPUT |
| clb_I3[5:9] | Yes | Yes | Yes | INPUT |
| clb_I3[4] | No | Yes | No | INPUT |
| clb_I3[1:3] | Yes | Yes | Yes | INPUT |
| clb_I3[0] | No | No | No | INPUT |
| clb_sc_in | No | No | No | INPUT |
| clb_cin | No | No | No | INPUT |
| clb_cin_trick | No | No | No | INPUT |
| clb_set | No | No | No | INPUT |
| clb_lreset | No | No | No | INPUT |
| clb_sync_set | No | No | No | INPUT |
| clb_sync_reset | Yes | Yes | Yes | INPUT |
| clb_reset | No | No | Yes | INPUT |
| clb_scan_reset | Yes | Yes | Yes | INPUT |
| clb_enable | No | No | No | INPUT |
| clb_reg_in | Yes | Yes | Yes | INPUT |
| clb_clk[0:3] | Yes | Yes | Yes | INPUT |
| bl[0:1111] | Yes | Yes | Yes | INPUT |
| wl[0:1111] | Yes | Yes | Yes | INPUT |
| wlr[0:1111] | No | No | No | INPUT |
| clb_O[0:19] | Yes | Yes | Yes | OUTPUT |
| clb_sc_out | Yes | Yes | Yes | OUTPUT |
| clb_cout | Yes | Yes | Yes | OUTPUT |
| clb_reg_out | Yes | Yes | Yes | OUTPUT |
| Name | Toggle | Toggle 1->0 | Toggle 0->1 |
| logical_tile_clb_mode_default__fle_0_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_out[0:1] | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_out[0:1] | Yes | Yes | Yes |
| mux_tree_size20_0_sram[0:4] | No | Yes | No |
| mux_tree_size20_0_sram_inv[0:4] | No | No | No |
| mux_tree_size20_10_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_10_sram_inv[0:4] | No | No | No |
| mux_tree_size20_11_sram[0:4] | No | Yes | No |
| mux_tree_size20_11_sram_inv[0:4] | No | No | No |
| mux_tree_size20_12_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size20_12_sram_inv[0:4] | No | No | No |
| mux_tree_size20_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_13_sram[2] | No | Yes | No |
| mux_tree_size20_13_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size20_13_sram_inv[0:4] | No | No | No |
| mux_tree_size20_14_sram[0:4] | No | Yes | No |
| mux_tree_size20_14_sram_inv[0:4] | No | No | No |
| mux_tree_size20_15_sram[3:4] | No | Yes | No |
| mux_tree_size20_15_sram[2] | Yes | Yes | Yes |
| mux_tree_size20_15_sram[0:1] | No | Yes | No |
| mux_tree_size20_15_sram_inv[0:4] | No | No | No |
| mux_tree_size20_16_sram[0:4] | No | Yes | No |
| mux_tree_size20_16_sram_inv[0:4] | No | No | No |
| mux_tree_size20_17_sram[0:4] | No | Yes | No |
| mux_tree_size20_17_sram_inv[0:4] | No | No | No |
| mux_tree_size20_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size20_18_sram[3] | No | No | Yes |
| mux_tree_size20_18_sram[2] | No | Yes | No |
| mux_tree_size20_18_sram[0:1] | No | No | Yes |
| mux_tree_size20_18_sram_inv[0:4] | No | No | No |
| mux_tree_size20_19_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_19_sram[0:1] | No | Yes | No |
| mux_tree_size20_19_sram_inv[0:4] | No | No | No |
| mux_tree_size20_1_sram[3:4] | No | Yes | No |
| mux_tree_size20_1_sram[1:2] | No | No | No |
| mux_tree_size20_1_sram[0] | No | Yes | No |
| mux_tree_size20_1_sram_inv[0:4] | No | No | No |
| mux_tree_size20_20_sram[0:4] | No | Yes | No |
| mux_tree_size20_20_sram_inv[0:4] | No | No | No |
| mux_tree_size20_21_sram[3:4] | No | Yes | No |
| mux_tree_size20_21_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size20_21_sram[0] | No | Yes | No |
| mux_tree_size20_21_sram_inv[0:4] | No | No | No |
| mux_tree_size20_22_sram[0:4] | No | Yes | No |
| mux_tree_size20_22_sram_inv[0:4] | No | No | No |
| mux_tree_size20_23_sram[0:4] | No | Yes | No |
| mux_tree_size20_23_sram_inv[0:4] | No | No | No |
| mux_tree_size20_24_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_24_sram[1] | No | No | Yes |
| mux_tree_size20_24_sram[0] | No | Yes | No |
| mux_tree_size20_24_sram_inv[0:4] | No | No | No |
| mux_tree_size20_25_sram[0:4] | No | Yes | No |
| mux_tree_size20_25_sram_inv[0:4] | No | No | No |
| mux_tree_size20_26_sram[0:4] | No | Yes | No |
| mux_tree_size20_26_sram_inv[0:4] | No | No | No |
| mux_tree_size20_27_sram[4] | No | No | No |
| mux_tree_size20_27_sram[3] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[2] | No | Yes | No |
| mux_tree_size20_27_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_27_sram[0] | No | Yes | No |
| mux_tree_size20_27_sram_inv[0:4] | No | No | No |
| mux_tree_size20_28_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[2] | No | Yes | No |
| mux_tree_size20_28_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_28_sram[0] | No | Yes | No |
| mux_tree_size20_28_sram_inv[0:4] | No | No | No |
| mux_tree_size20_29_sram[0:4] | No | Yes | No |
| mux_tree_size20_29_sram_inv[0:4] | No | No | No |
| mux_tree_size20_2_sram[4] | No | Yes | No |
| mux_tree_size20_2_sram[3] | No | No | No |
| mux_tree_size20_2_sram[0:2] | No | Yes | No |
| mux_tree_size20_2_sram_inv[0:4] | No | No | No |
| mux_tree_size20_3_sram[3:4] | No | Yes | No |
| mux_tree_size20_3_sram[2] | No | No | No |
| mux_tree_size20_3_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_3_sram[0] | No | Yes | No |
| mux_tree_size20_3_sram_inv[0:4] | No | No | No |
| mux_tree_size20_4_sram[4] | No | No | Yes |
| mux_tree_size20_4_sram[3] | No | No | No |
| mux_tree_size20_4_sram[2] | No | No | Yes |
| mux_tree_size20_4_sram[1] | Yes | Yes | Yes |
| mux_tree_size20_4_sram[0] | No | Yes | No |
| mux_tree_size20_4_sram_inv[0:4] | No | No | No |
| mux_tree_size20_5_sram[0:4] | No | Yes | No |
| mux_tree_size20_5_sram_inv[0:4] | No | No | No |
| mux_tree_size20_6_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size20_6_sram[1:2] | No | No | Yes |
| mux_tree_size20_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_6_sram_inv[0:4] | No | No | No |
| mux_tree_size20_7_sram[4] | No | Yes | No |
| mux_tree_size20_7_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size20_7_sram[1] | No | Yes | No |
| mux_tree_size20_7_sram[0] | No | No | No |
| mux_tree_size20_7_sram_inv[0:4] | No | No | No |
| mux_tree_size20_8_sram[0:4] | No | Yes | No |
| mux_tree_size20_8_sram_inv[0:4] | No | No | No |
| mux_tree_size20_9_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size20_9_sram[1] | No | Yes | No |
| mux_tree_size20_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size20_9_sram_inv[0:4] | No | No | No |
| mux_tree_size2_0_sram[0:1] | No | Yes | No |
| mux_tree_size2_0_sram_inv[0:1] | No | No | No |
| mux_tree_size30_0_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_0_sram[0:2] | No | Yes | No |
| mux_tree_size30_0_sram_inv[0:4] | No | No | No |
| mux_tree_size30_10_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_10_sram[1] | No | No | Yes |
| mux_tree_size30_10_sram[0] | No | No | No |
| mux_tree_size30_10_sram_inv[0:4] | No | No | No |
| mux_tree_size30_11_sram[4] | No | Yes | No |
| mux_tree_size30_11_sram[3] | No | No | Yes |
| mux_tree_size30_11_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_11_sram_inv[0:4] | No | No | No |
| mux_tree_size30_12_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_12_sram_inv[0:4] | No | No | No |
| mux_tree_size30_13_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_13_sram[1:2] | No | Yes | No |
| mux_tree_size30_13_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_13_sram_inv[0:4] | No | No | No |
| mux_tree_size30_14_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[3] | No | Yes | No |
| mux_tree_size30_14_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_14_sram[0:1] | No | Yes | No |
| mux_tree_size30_14_sram_inv[0:4] | No | No | No |
| mux_tree_size30_15_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_15_sram[3] | No | Yes | No |
| mux_tree_size30_15_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_15_sram_inv[0:4] | No | No | No |
| mux_tree_size30_16_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_16_sram[3] | No | Yes | No |
| mux_tree_size30_16_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size30_16_sram_inv[0:4] | No | No | No |
| mux_tree_size30_17_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_17_sram[1] | No | No | Yes |
| mux_tree_size30_17_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_17_sram_inv[0:4] | No | No | No |
| mux_tree_size30_18_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[3] | No | No | No |
| mux_tree_size30_18_sram[2] | No | Yes | No |
| mux_tree_size30_18_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_18_sram[0] | No | Yes | No |
| mux_tree_size30_18_sram_inv[0:4] | No | No | No |
| mux_tree_size30_19_sram[3:4] | Yes | Yes | Yes |
| mux_tree_size30_19_sram[2] | No | Yes | No |
| mux_tree_size30_19_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_19_sram_inv[0:4] | No | No | No |
| mux_tree_size30_1_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[3] | No | No | Yes |
| mux_tree_size30_1_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_1_sram[1] | No | Yes | No |
| mux_tree_size30_1_sram[0] | No | No | No |
| mux_tree_size30_1_sram_inv[0:4] | No | No | No |
| mux_tree_size30_20_sram[0:4] | Yes | Yes | Yes |
| mux_tree_size30_20_sram_inv[0:4] | No | No | No |
| mux_tree_size30_21_sram[4] | No | Yes | No |
| mux_tree_size30_21_sram[0:3] | Yes | Yes | Yes |
| mux_tree_size30_21_sram_inv[0:4] | No | No | No |
| mux_tree_size30_22_sram[1:4] | Yes | Yes | Yes |
| mux_tree_size30_22_sram[0] | No | Yes | No |
| mux_tree_size30_22_sram_inv[0:4] | No | No | No |
| mux_tree_size30_23_sram[4] | No | Yes | No |
| mux_tree_size30_23_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_23_sram[2] | No | No | Yes |
| mux_tree_size30_23_sram[0:1] | No | Yes | No |
| mux_tree_size30_23_sram_inv[0:4] | No | No | No |
| mux_tree_size30_24_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[3] | No | No | Yes |
| mux_tree_size30_24_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_24_sram[1] | No | No | No |
| mux_tree_size30_24_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_24_sram_inv[0:4] | No | No | No |
| mux_tree_size30_25_sram[4] | No | No | Yes |
| mux_tree_size30_25_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_25_sram[0] | No | Yes | No |
| mux_tree_size30_25_sram_inv[0:4] | No | No | No |
| mux_tree_size30_26_sram[4] | No | Yes | No |
| mux_tree_size30_26_sram[2:3] | Yes | Yes | Yes |
| mux_tree_size30_26_sram[1] | No | Yes | No |
| mux_tree_size30_26_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_26_sram_inv[0:4] | No | No | No |
| mux_tree_size30_27_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_27_sram[1] | No | Yes | No |
| mux_tree_size30_27_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_27_sram_inv[0:4] | No | No | No |
| mux_tree_size30_28_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_28_sram[0:3] | No | Yes | No |
| mux_tree_size30_28_sram_inv[0:4] | No | No | No |
| mux_tree_size30_29_sram[4] | No | No | Yes |
| mux_tree_size30_29_sram[3] | No | Yes | No |
| mux_tree_size30_29_sram[2] | No | No | Yes |
| mux_tree_size30_29_sram[1] | No | No | No |
| mux_tree_size30_29_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_29_sram_inv[0:4] | No | No | No |
| mux_tree_size30_2_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[3] | No | No | No |
| mux_tree_size30_2_sram[2] | Yes | Yes | Yes |
| mux_tree_size30_2_sram[1] | No | Yes | No |
| mux_tree_size30_2_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_2_sram_inv[0:4] | No | No | No |
| mux_tree_size30_3_sram[2:4] | Yes | Yes | Yes |
| mux_tree_size30_3_sram[0:1] | No | Yes | No |
| mux_tree_size30_3_sram_inv[0:4] | No | No | No |
| mux_tree_size30_4_sram[4] | No | Yes | No |
| mux_tree_size30_4_sram[1:3] | Yes | Yes | Yes |
| mux_tree_size30_4_sram[0] | No | Yes | No |
| mux_tree_size30_4_sram_inv[0:4] | No | No | No |
| mux_tree_size30_5_sram[3:4] | No | No | Yes |
| mux_tree_size30_5_sram[2] | No | No | No |
| mux_tree_size30_5_sram[1] | No | Yes | No |
| mux_tree_size30_5_sram[0] | Yes | Yes | Yes |
| mux_tree_size30_5_sram_inv[0:4] | No | No | No |
| mux_tree_size30_6_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_6_sram[3] | No | No | No |
| mux_tree_size30_6_sram[2] | No | Yes | No |
| mux_tree_size30_6_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_6_sram_inv[0:4] | No | No | No |
| mux_tree_size30_7_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_7_sram[2:3] | No | Yes | No |
| mux_tree_size30_7_sram[0:1] | Yes | Yes | Yes |
| mux_tree_size30_7_sram_inv[0:4] | No | No | No |
| mux_tree_size30_8_sram[4] | No | No | Yes |
| mux_tree_size30_8_sram[3] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[2] | No | Yes | No |
| mux_tree_size30_8_sram[1] | Yes | Yes | Yes |
| mux_tree_size30_8_sram[0] | No | No | Yes |
| mux_tree_size30_8_sram_inv[0:4] | No | No | No |
| mux_tree_size30_9_sram[4] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[3] | No | Yes | No |
| mux_tree_size30_9_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size30_9_sram[0] | No | Yes | No |
| mux_tree_size30_9_sram_inv[0:4] | No | No | No |
| mux_tree_size4_0_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_0_sram_inv[0:2] | No | No | No |
| mux_tree_size4_1_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_1_sram_inv[0:2] | No | No | No |
| mux_tree_size4_2_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_2_sram_inv[0:2] | No | No | No |
| mux_tree_size4_3_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_3_sram_inv[0:2] | No | No | No |
| mux_tree_size4_4_sram[1:2] | Yes | Yes | Yes |
| mux_tree_size4_4_sram[0] | No | No | Yes |
| mux_tree_size4_4_sram_inv[0:2] | No | No | No |
| mux_tree_size4_5_sram[0:2] | Yes | Yes | Yes |
| mux_tree_size4_5_sram_inv[0:2] | No | No | No |
| mux_tree_size4_6_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_6_sram[1] | No | No | Yes |
| mux_tree_size4_6_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_6_sram_inv[0:2] | No | No | No |
| mux_tree_size4_7_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_7_sram[1] | No | No | Yes |
| mux_tree_size4_7_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_7_sram_inv[0:2] | No | No | No |
| mux_tree_size4_8_sram[2] | Yes | Yes | Yes |
| mux_tree_size4_8_sram[1] | No | No | Yes |
| mux_tree_size4_8_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_8_sram_inv[0:2] | No | No | No |
| mux_tree_size4_9_sram[1:2] | No | No | Yes |
| mux_tree_size4_9_sram[0] | Yes | Yes | Yes |
| mux_tree_size4_9_sram_inv[0:2] | No | No | No |
| and_rst | No | No | Yes |
| set | No | No | No |
| rst | No | No | Yes |
| clb_lreset_b | No | No | No |
| clb_lreset_q | No | No | No |
| mux_tree_size30_0_out | No | Yes | No |
| mux_tree_size30_1_out | Yes | Yes | Yes |
| mux_tree_size30_2_out | Yes | Yes | Yes |
| mux_tree_size20_0_out | No | No | No |
| mux_tree_size20_1_out | No | No | No |
| mux_tree_size20_2_out | No | No | No |
| mux_tree_size2_0_out | No | No | No |
| direct_interc_23_out | No | No | No |
| direct_interc_26_out | No | No | No |
| direct_interc_27_out | Yes | Yes | Yes |
| direct_interc_28_out | No | No | No |
| direct_interc_29_out | Yes | Yes | Yes |
| mux_tree_size4_0_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_0_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_3_out | Yes | Yes | Yes |
| mux_tree_size30_4_out | Yes | Yes | Yes |
| mux_tree_size30_5_out | Yes | Yes | Yes |
| mux_tree_size20_3_out | Yes | Yes | Yes |
| mux_tree_size20_4_out | Yes | Yes | Yes |
| mux_tree_size20_5_out | No | No | No |
| direct_interc_30_out | Yes | Yes | Yes |
| direct_interc_31_out | Yes | Yes | Yes |
| direct_interc_34_out | No | No | No |
| direct_interc_35_out | Yes | Yes | Yes |
| direct_interc_36_out | No | No | No |
| direct_interc_37_out | Yes | Yes | Yes |
| mux_tree_size4_1_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_1_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_6_out | Yes | Yes | Yes |
| mux_tree_size30_7_out | Yes | Yes | Yes |
| mux_tree_size30_8_out | Yes | Yes | Yes |
| mux_tree_size20_6_out | Yes | Yes | Yes |
| mux_tree_size20_7_out | No | Yes | No |
| mux_tree_size20_8_out | No | No | No |
| direct_interc_38_out | Yes | Yes | Yes |
| direct_interc_39_out | Yes | Yes | Yes |
| direct_interc_42_out | No | No | No |
| direct_interc_43_out | Yes | Yes | Yes |
| direct_interc_44_out | No | No | No |
| direct_interc_45_out | Yes | Yes | Yes |
| mux_tree_size4_2_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_2_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_9_out | Yes | Yes | Yes |
| mux_tree_size30_10_out | Yes | Yes | Yes |
| mux_tree_size30_11_out | Yes | Yes | Yes |
| mux_tree_size20_9_out | Yes | Yes | Yes |
| mux_tree_size20_10_out | No | Yes | No |
| mux_tree_size20_11_out | No | No | No |
| direct_interc_46_out | Yes | Yes | Yes |
| direct_interc_47_out | Yes | Yes | Yes |
| direct_interc_50_out | No | No | No |
| direct_interc_51_out | Yes | Yes | Yes |
| direct_interc_52_out | No | No | No |
| direct_interc_53_out | Yes | Yes | Yes |
| mux_tree_size4_3_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_3_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_12_out | Yes | Yes | Yes |
| mux_tree_size30_13_out | Yes | Yes | Yes |
| mux_tree_size30_14_out | Yes | Yes | Yes |
| mux_tree_size20_12_out | Yes | Yes | Yes |
| mux_tree_size20_13_out | Yes | Yes | Yes |
| mux_tree_size20_14_out | No | No | No |
| direct_interc_54_out | Yes | Yes | Yes |
| direct_interc_55_out | Yes | Yes | Yes |
| direct_interc_58_out | No | No | No |
| direct_interc_59_out | Yes | Yes | Yes |
| direct_interc_60_out | No | No | No |
| direct_interc_61_out | Yes | Yes | Yes |
| mux_tree_size4_4_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_4_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_15_out | Yes | Yes | Yes |
| mux_tree_size30_16_out | Yes | Yes | Yes |
| mux_tree_size30_17_out | Yes | Yes | Yes |
| mux_tree_size20_15_out | Yes | Yes | Yes |
| mux_tree_size20_16_out | No | No | No |
| mux_tree_size20_17_out | No | No | No |
| direct_interc_62_out | Yes | Yes | Yes |
| direct_interc_63_out | Yes | Yes | Yes |
| direct_interc_66_out | No | No | No |
| direct_interc_67_out | Yes | Yes | Yes |
| direct_interc_68_out | No | No | No |
| direct_interc_69_out | Yes | Yes | Yes |
| mux_tree_size4_5_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_5_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_18_out | Yes | Yes | Yes |
| mux_tree_size30_19_out | Yes | Yes | Yes |
| mux_tree_size30_20_out | Yes | Yes | Yes |
| mux_tree_size20_18_out | Yes | Yes | Yes |
| mux_tree_size20_19_out | No | Yes | No |
| mux_tree_size20_20_out | No | No | No |
| direct_interc_70_out | Yes | Yes | Yes |
| direct_interc_71_out | Yes | Yes | Yes |
| direct_interc_74_out | No | No | No |
| direct_interc_75_out | Yes | Yes | Yes |
| direct_interc_76_out | No | No | No |
| direct_interc_77_out | Yes | Yes | Yes |
| mux_tree_size4_6_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_6_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_21_out | Yes | Yes | Yes |
| mux_tree_size30_22_out | Yes | Yes | Yes |
| mux_tree_size30_23_out | Yes | Yes | Yes |
| mux_tree_size20_21_out | Yes | Yes | Yes |
| mux_tree_size20_22_out | No | No | No |
| mux_tree_size20_23_out | No | No | No |
| direct_interc_78_out | Yes | Yes | Yes |
| direct_interc_79_out | Yes | Yes | Yes |
| direct_interc_82_out | No | No | No |
| direct_interc_83_out | Yes | Yes | Yes |
| direct_interc_84_out | No | No | No |
| direct_interc_85_out | Yes | Yes | Yes |
| mux_tree_size4_7_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_7_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_24_out | Yes | Yes | Yes |
| mux_tree_size30_25_out | Yes | Yes | Yes |
| mux_tree_size30_26_out | Yes | Yes | Yes |
| mux_tree_size20_24_out | Yes | Yes | Yes |
| mux_tree_size20_25_out | No | No | No |
| mux_tree_size20_26_out | No | No | No |
| direct_interc_86_out | Yes | Yes | Yes |
| direct_interc_87_out | Yes | Yes | Yes |
| direct_interc_90_out | No | No | No |
| direct_interc_91_out | Yes | Yes | Yes |
| direct_interc_92_out | No | No | No |
| direct_interc_93_out | Yes | Yes | Yes |
| mux_tree_size4_8_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_8_fle_reg_out | Yes | Yes | Yes |
| mux_tree_size30_27_out | Yes | Yes | Yes |
| mux_tree_size30_28_out | Yes | Yes | Yes |
| mux_tree_size30_29_out | Yes | Yes | Yes |
| mux_tree_size20_27_out | Yes | Yes | Yes |
| mux_tree_size20_28_out | Yes | Yes | Yes |
| mux_tree_size20_29_out | No | No | No |
| direct_interc_94_out | Yes | Yes | Yes |
| direct_interc_95_out | Yes | Yes | Yes |
| direct_interc_98_out | No | No | No |
| direct_interc_99_out | Yes | Yes | Yes |
| direct_interc_100_out | No | No | No |
| direct_interc_101_out | Yes | Yes | Yes |
| mux_tree_size4_9_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_cout | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_sc_out | Yes | Yes | Yes |
| logical_tile_clb_mode_default__fle_9_fle_reg_out | Yes | Yes | Yes |
| direct_interc_24_out | No | No | No |
| direct_interc_25_out | No | No | No |
| direct_interc_32_out | No | No | No |
| direct_interc_33_out | No | No | No |
| direct_interc_40_out | No | No | No |
| direct_interc_41_out | No | No | No |
| direct_interc_48_out | No | No | No |
| direct_interc_49_out | No | No | No |
| direct_interc_56_out | No | No | No |
| direct_interc_57_out | No | No | No |
| direct_interc_64_out | No | No | No |
| direct_interc_65_out | No | No | No |
| direct_interc_72_out | No | No | No |
| direct_interc_73_out | No | No | No |
| direct_interc_80_out | No | No | No |
| direct_interc_81_out | No | No | No |
| direct_interc_88_out | No | No | No |
| direct_interc_89_out | No | No | No |
| direct_interc_96_out | No | No | No |
| direct_interc_97_out | No | No | No |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |